PCI: Remove pciBusAddrToHostAddr and associated nonsense
This was all a glorified no-op. We rely on pciaccess to create device maps anyway, so we should have no reason to care about what the host address is. Acked-by: Ian Romanick <ian.d.romanick at intel.com> Signed-off-by: Adam Jackson <ajax@redhat.com>
This commit is contained in:
parent
be8c3d4022
commit
a9d7d659a0
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@ -920,37 +920,6 @@ pciConvertRange2Host(int entityIndex, resRange *pRange)
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if (!(pRange->type & ResBus))
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if (!(pRange->type & ResBus))
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return;
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return;
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switch(pRange->type & ResPhysMask) {
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case ResMem:
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switch(pRange->type & ResExtMask) {
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case ResBlock:
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pRange->rBegin = pciBusAddrToHostAddr(tag,PCI_MEM, pRange->rBegin);
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pRange->rEnd = pciBusAddrToHostAddr(tag,PCI_MEM, pRange->rEnd);
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break;
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case ResSparse:
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pRange->rBase = pciBusAddrToHostAddr(tag,PCI_MEM_SPARSE_BASE,
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pRange->rBegin);
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pRange->rMask = pciBusAddrToHostAddr(tag,PCI_MEM_SPARSE_MASK,
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pRange->rEnd);
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break;
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}
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break;
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case ResIo:
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switch(pRange->type & ResExtMask) {
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case ResBlock:
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pRange->rBegin = pciBusAddrToHostAddr(tag,PCI_IO, pRange->rBegin);
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pRange->rEnd = pciBusAddrToHostAddr(tag,PCI_IO, pRange->rEnd);
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break;
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case ResSparse:
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pRange->rBase = pciBusAddrToHostAddr(tag,PCI_IO_SPARSE_BASE
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, pRange->rBegin);
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pRange->rMask = pciBusAddrToHostAddr(tag,PCI_IO_SPARSE_MASK
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, pRange->rEnd);
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break;
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}
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break;
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}
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/* Set domain number */
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/* Set domain number */
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pRange->type &= ~(ResDomain | ResBus);
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pRange->type &= ~(ResDomain | ResBus);
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pRange->type |= pvp->domain << 24;
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pRange->type |= pvp->domain << 24;
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@ -138,29 +138,12 @@
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/* Global data */
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/* Global data */
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pciBusFuncs_t *pciBusFuncs = NULL;
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ADDRESS
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pciBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr)
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{
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if (pciBusFuncs && pciBusFuncs->pciAddrBusToHost)
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return pciBusFuncs->pciAddrBusToHost(tag, type, addr);
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else
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return addr;
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}
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PCITAG
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PCITAG
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pciTag(int busnum, int devnum, int funcnum)
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pciTag(int busnum, int devnum, int funcnum)
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{
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{
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return(PCI_MAKE_TAG(busnum,devnum,funcnum));
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return(PCI_MAKE_TAG(busnum,devnum,funcnum));
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}
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}
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ADDRESS
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pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS addr)
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{
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return(addr);
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}
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Bool
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Bool
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xf86scanpci(void)
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xf86scanpci(void)
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{
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{
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@ -183,17 +183,4 @@
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extern void ARCH_PCI_INIT(void);
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extern void ARCH_PCI_INIT(void);
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/*
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* Table of functions used to access a specific PCI bus domain
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* (e.g. a primary PCI bus and all of its secondaries)
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*/
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typedef struct pci_bus_funcs {
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ADDRESS (*pciAddrBusToHost)(PCITAG, PciAddrType, ADDRESS);
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} pciBusFuncs_t, *pciBusFuncs_p;
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/* Generic PCI service functions and helpers */
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ADDRESS pciAddrNOOP(PCITAG tag, PciAddrType type, ADDRESS);
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extern pciBusFuncs_t *pciBusFuncs;
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#endif /* _PCI_H */
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#endif /* _PCI_H */
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@ -57,29 +57,6 @@
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#include "Pci.h"
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#include "Pci.h"
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#include <dirent.h>
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#include <dirent.h>
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/*
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* linux platform specific PCI access functions -- using /proc/bus/pci
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* needs kernel version 2.2.x
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*/
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static ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr);
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#if defined(__powerpc__)
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static ADDRESS linuxPpcBusAddrToHostAddr(PCITAG, PciAddrType, ADDRESS);
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#endif
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static pciBusFuncs_t linuxFuncs0 = {
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#if defined(__powerpc__)
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/* pciAddrBusToHost */ linuxPpcBusAddrToHostAddr,
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#else
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/* linuxTransAddrBusToHost is busted on sparc64 but the PCI rework tree
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* makes it all moot, so we kludge it for now */
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#if defined(__sparc__)
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/* pciAddrBusToHost */ pciAddrNOOP,
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#else
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/* pciAddrBusToHost */ linuxTransAddrBusToHost,
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#endif /* __sparc64__ */
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#endif
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};
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static const struct pci_id_match match_host_bridge = {
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static const struct pci_id_match match_host_bridge = {
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PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,
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PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY, PCI_MATCH_ANY,
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(PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_HOST << 8),
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(PCI_CLASS_BRIDGE << 16) | (PCI_SUBCLASS_BRIDGE_HOST << 8),
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@ -95,13 +72,6 @@ linuxPciInit(void)
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struct stat st;
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struct stat st;
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memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO));
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memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO));
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if (-1 == stat("/proc/bus/pci", &st)) {
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/* when using this as default for all linux architectures,
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we'll need a fallback for 2.0 kernels here */
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return;
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}
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pciBusFuncs = &linuxFuncs0;
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}
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}
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/**
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/**
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@ -178,53 +148,6 @@ linuxPciOpenFile(struct pci_device *dev, Bool write)
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return fd;
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return fd;
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}
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}
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/*
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* This function will convert a BAR address into a host address
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* suitable for passing into the mmap function of a /proc/bus
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* device.
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*/
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ADDRESS linuxTransAddrBusToHost(PCITAG tag, PciAddrType type, ADDRESS addr)
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{
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ADDRESS ret = xf86GetOSOffsetFromPCI(tag, PCI_MEM|PCI_IO, addr);
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if (ret)
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return ret;
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/*
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* if it is not a BAR address, it must be legacy, (or wrong)
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* return it as is..
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*/
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return addr;
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}
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#if defined(__powerpc__)
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#ifndef __NR_pciconfig_iobase
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#define __NR_pciconfig_iobase 200
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#endif
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static ADDRESS
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linuxPpcBusAddrToHostAddr(PCITAG tag, PciAddrType type, ADDRESS addr)
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{
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if (type == PCI_MEM)
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{
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ADDRESS membase = syscall(__NR_pciconfig_iobase, 1,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr + membase);
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}
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else if (type == PCI_IO)
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{
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ADDRESS iobase = syscall(__NR_pciconfig_iobase, 2,
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PCI_BUS_FROM_TAG(tag), PCI_DFN_FROM_TAG(tag));
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return (addr + iobase);
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}
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else return addr;
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}
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#endif /* __powerpc__ */
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/*
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/*
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* Compiling the following simply requires the presence of <linux/pci.c>.
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* Compiling the following simply requires the presence of <linux/pci.c>.
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* Actually running this is another matter altogether...
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* Actually running this is another matter altogether...
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@ -26,7 +26,7 @@ XORG_CFLAGS += -DHAVE_APM
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endif
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endif
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liblinux_la_SOURCES = lnx_init.c lnx_video.c \
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liblinux_la_SOURCES = lnx_init.c lnx_video.c \
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lnx_pci.c lnx_agp.c lnx_kmod.c lnx_bell.c \
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lnx_agp.c lnx_kmod.c lnx_bell.c \
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$(srcdir)/../shared/bios_mmap.c \
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$(srcdir)/../shared/bios_mmap.c \
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$(srcdir)/../shared/VTsw_usl.c \
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$(srcdir)/../shared/VTsw_usl.c \
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$(srcdir)/../shared/posix_tty.c \
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$(srcdir)/../shared/posix_tty.c \
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@ -1,193 +0,0 @@
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#endif
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#include <sys/types.h>
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#include <stdio.h>
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#include <dirent.h>
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#include <X11/X.h>
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#include "os.h"
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#include "xf86.h"
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#include "xf86Priv.h"
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#define XF86_OS_PRIVS
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#include "xf86_OSproc.h"
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#include "xf86Pci.h"
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#include "Pci.h"
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#ifdef __sparc__
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#define PCIADDR_TYPE long long
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#define PCIADDR_IGNORE_FMT "%*x"
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#define PCIADDR_FMT "%llx"
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#else
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#define PCIADDR_TYPE long
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#define PCIADDR_IGNORE_FMT "%*x"
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#define PCIADDR_FMT "%lx"
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#endif
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struct pci_dev {
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unsigned int domain;
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unsigned int bus;
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unsigned int dev;
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unsigned int fn;
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PCIADDR_TYPE offset[7];
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PCIADDR_TYPE size[7];
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struct pci_dev *next;
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};
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struct pci_dev *xf86OSLinuxPCIDevs = NULL;
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int xf86OSLinuxNumPciDevs = 0;
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static struct pci_dev *xf86OSLinuxGetPciDevs(void) {
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char c[0x200];
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FILE *file = NULL;
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DIR *dir;
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struct dirent *dirent;
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struct pci_dev *tmp, *ret = NULL;
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unsigned int i, num, devfn;
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unsigned PCIADDR_TYPE begin, end;
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char *res;
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/* Try 2.6 devices first, with domain support */
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if ( (dir = opendir ("/sys/bus/pci/devices")) ) {
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xf86OSLinuxNumPciDevs = 0;
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while ( (dirent = readdir (dir)) ) {
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unsigned int domain, bus, dev, fn;
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if (sscanf (dirent->d_name, "%04x:%02x:%02x.%01x",
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&domain, &bus, &dev, &fn) == 4) {
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tmp = xcalloc (sizeof(struct pci_dev), 1);
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tmp->domain = domain;
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tmp->bus = bus;
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tmp->dev = dev;
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tmp->fn = fn;
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sprintf (c, "/sys/bus/pci/devices/%12s/resource",
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dirent->d_name);
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i = 0;
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if ( (file = fopen (c, "r")) ) {
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while (i < 7 && fgets (c, 0x200, file)) {
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if (sscanf (c, PCIADDR_FMT " " PCIADDR_FMT " "
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PCIADDR_IGNORE_FMT, &begin, &end) == 2) {
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tmp->offset[i] = begin;
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tmp->size[i] = begin ? end-begin+1 : 0;
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i++;
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}
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}
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fclose (file);
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}
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if (i > 0) {
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tmp->next = ret;
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ret = tmp;
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xf86OSLinuxNumPciDevs++;
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} else
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xfree (tmp);
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}
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}
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closedir (dir);
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}
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if (ret)
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return ret;
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file = fopen("/proc/bus/pci/devices", "r");
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if (!file) return NULL;
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xf86OSLinuxNumPciDevs = 0;
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do {
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res = fgets(c, 0x1ff, file);
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if (res) {
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tmp = xcalloc(sizeof(struct pci_dev),1);
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num = sscanf(res,
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/*bus+dev vendorid deviceid irq */
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"%02x%02x\t%*04x%*04x\t%*x"
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/* 7 PCI resource base addresses */
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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/* 7 PCI resource sizes, and then optionally a driver name */
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT
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"\t" PCIADDR_FMT,
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&tmp->bus,&devfn,&tmp->offset[0],&tmp->offset[1],&tmp->offset[2],&tmp->offset[3],
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&tmp->offset[4],&tmp->offset[5],&tmp->offset[6], &tmp->size[0], &tmp->size[1], &tmp->size[2],
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&tmp->size[3], &tmp->size[4], &tmp->size[5], &tmp->size[6]);
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tmp->dev = devfn >> 3;
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tmp->fn = devfn & 0x7;
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if (num != 16) { /* apparantly not 2.3 style */
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xfree(tmp);
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fclose(file);
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return NULL;
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}
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if (ret) {
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tmp->next = ret;
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}
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ret = tmp;
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xf86OSLinuxNumPciDevs++;
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}
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} while (res);
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fclose(file);
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return ret;
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}
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/* Query the kvirt address (64bit) of a BAR range from size for a given TAG */
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unsigned long
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xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base)
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{
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unsigned int ndx;
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struct pci_dev *device;
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struct pci_device *dev;
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if (!xf86OSLinuxPCIDevs) {
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xf86OSLinuxPCIDevs = xf86OSLinuxGetPciDevs();
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}
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if (!xf86OSLinuxPCIDevs) {
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return FALSE;
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}
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for (device = xf86OSLinuxPCIDevs; device; device = device->next) {
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dev = pci_device_find_by_slot(device->domain, device->bus,
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device->dev, device->fn);
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if (dev != NULL) {
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/* ok now look through all the BAR values of this device */
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for (ndx=0; ndx<7; ndx++) {
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uint32_t savePtr;
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uint32_t flagMask;
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/* The ROM BAR isn't with the other BARs.
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*/
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const pciaddr_t offset = (ndx == 6)
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? (4 * 12) : (4 * ndx) + 16;
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pci_device_cfg_read_u32(dev, &savePtr, offset);
|
|
||||||
|
|
||||||
/* Ignore unset base addresses. The kernel may have reported
|
|
||||||
* non-zero size and address even if they are disabled (e.g.,
|
|
||||||
* disabled ROM BAR).
|
|
||||||
*/
|
|
||||||
if (savePtr == 0)
|
|
||||||
continue;
|
|
||||||
|
|
||||||
/* Remove memory attribute bits, different for IO
|
|
||||||
* and memory ranges.
|
|
||||||
*/
|
|
||||||
flagMask = (savePtr & 0x1) ? ~0x3UL : ~0xFUL;
|
|
||||||
savePtr &= flagMask;
|
|
||||||
|
|
||||||
/* find the index of the incoming base */
|
|
||||||
if (base >= savePtr && base < (savePtr + device->size[ndx])) {
|
|
||||||
return (device->offset[ndx] & flagMask) + (base - savePtr);
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
|
@ -224,8 +224,6 @@ extern _X_EXPORT resPtr xf86StdAccResFromOS(resPtr ret);
|
||||||
extern _X_EXPORT resPtr xf86AccResFromOS(resPtr ret);
|
extern _X_EXPORT resPtr xf86AccResFromOS(resPtr ret);
|
||||||
#endif /* NEED_OS_RAC_PROTOS */
|
#endif /* NEED_OS_RAC_PROTOS */
|
||||||
|
|
||||||
extern _X_EXPORT unsigned long xf86GetOSOffsetFromPCI(PCITAG tag, int space, unsigned long base);
|
|
||||||
|
|
||||||
extern _X_EXPORT void xf86MakeNewMapping(int, int, unsigned long, unsigned long, pointer);
|
extern _X_EXPORT void xf86MakeNewMapping(int, int, unsigned long, unsigned long, pointer);
|
||||||
extern _X_EXPORT void xf86InitVidMem(void);
|
extern _X_EXPORT void xf86InitVidMem(void);
|
||||||
|
|
||||||
|
|
Loading…
Reference in New Issue
Block a user