andreacavalli/xserver-multidpi
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Remove PciProbeType and associated weirdness.

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This code was effectively only used in ix86Pci.c to select PCI config
access type.  Nobody should be using that path anymore, in the glorious
pciaccess world; kernel services should get it right for you.
This commit is contained in:
Adam Jackson 2008-08-18 13:13:03 -04:00
parent 95bb6f5362
commit fdf7c747a8
5 changed files with 138 additions and 247 deletions
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31
hw/xfree86/common/xf86Config.c
View File

@ -738,12 +738,6 @@ typedef enum {
FLAG_ALLOWMOUSEOPENFAIL,
FLAG_VTSYSREQ,
FLAG_XKBDISABLE,
FLAG_PCIPROBE1,
FLAG_PCIPROBE2,
FLAG_PCIFORCECONFIG1,
FLAG_PCIFORCECONFIG2,
FLAG_PCIFORCENONE,
FLAG_PCIOSCONFIG,
FLAG_SAVER_BLANKTIME,
FLAG_DPMS_STANDBYTIME,
FLAG_DPMS_SUSPENDTIME,
@ -792,18 +786,6 @@ static OptionInfoRec FlagOptions[] = {
{0}, FALSE },
{ FLAG_XKBDISABLE, "XkbDisable", OPTV_BOOLEAN,
{0}, FALSE },
{ FLAG_PCIPROBE1, "PciProbe1" , OPTV_BOOLEAN,
{0}, FALSE },
{ FLAG_PCIPROBE2, "PciProbe2", OPTV_BOOLEAN,
{0}, FALSE },
{ FLAG_PCIFORCECONFIG1, "PciForceConfig1", OPTV_BOOLEAN,
{0}, FALSE },
{ FLAG_PCIFORCECONFIG2, "PciForceConfig2", OPTV_BOOLEAN,
{0}, FALSE },
{ FLAG_PCIFORCENONE, "PciForceNone", OPTV_BOOLEAN,
{0}, FALSE },
{ FLAG_PCIOSCONFIG, "PciOsConfig", OPTV_BOOLEAN,
{0}, FALSE },
{ FLAG_SAVER_BLANKTIME, "BlankTime" , OPTV_INTEGER,
{0}, FALSE },
{ FLAG_DPMS_STANDBYTIME, "StandbyTime", OPTV_INTEGER,
@ -973,19 +955,6 @@ configServerFlags(XF86ConfFlagsPtr flagsconf, XF86OptionPtr layoutopts)
#endif
}
if (xf86IsOptionSet(FlagOptions, FLAG_PCIPROBE1))
xf86Info.pciFlags = PCIProbe1;
if (xf86IsOptionSet(FlagOptions, FLAG_PCIPROBE2))
xf86Info.pciFlags = PCIProbe2;
if (xf86IsOptionSet(FlagOptions, FLAG_PCIFORCECONFIG1))
xf86Info.pciFlags = PCIForceConfig1;
if (xf86IsOptionSet(FlagOptions, FLAG_PCIFORCECONFIG2))
xf86Info.pciFlags = PCIForceConfig2;
if (xf86IsOptionSet(FlagOptions, FLAG_PCIOSCONFIG))
xf86Info.pciFlags = PCIOsConfig;
if (xf86IsOptionSet(FlagOptions, FLAG_PCIFORCENONE))
xf86Info.pciFlags = PCIForceNone;
xf86Info.pmFlag = TRUE;
if (xf86GetOptValBool(FlagOptions, FLAG_NOPM, &value))
xf86Info.pmFlag = !value;

1
hw/xfree86/common/xf86Globals.c
View File

@ -119,7 +119,6 @@ xf86InfoRec xf86Info = {
FALSE, /* vidModeAllowNonLocal */
TRUE, /* miscModInDevEnabled */
FALSE, /* miscModInDevAllowNonLocal */
PCIOsConfig, /* pciFlags */
Pix24DontCare, /* pixmap24 */
X_DEFAULT, /* pix24From */
#ifdef __i386__

12
hw/xfree86/common/xf86Privstr.h
View File

@ -37,17 +37,6 @@
#include "xf86Pci.h"
#include "xf86str.h"
/* PCI probe flags */
typedef enum {
PCIProbe1 = 0,
PCIProbe2,
PCIForceConfig1,
PCIForceConfig2,
PCIForceNone,
PCIOsConfig
} PciProbeType;
typedef enum {
LogNone,
LogFlush,
@ -108,7 +97,6 @@ typedef struct {
Bool miscModInDevEnabled; /* Allow input devices to be
* changed */
Bool miscModInDevAllowNonLocal;
PciProbeType pciFlags;
Pix24Flags pixmap24;
MessageType pix24From;
#ifdef __i386__

324
hw/xfree86/os-support/bus/ix86Pci.c
View File

@ -277,8 +277,8 @@ ix86PciBusCheck(void)
return FALSE;
}
static
void ix86PciSelectCfgmech(void)
static void
ix86PciSelectCfgmech(void)
{
static Bool beenhere = FALSE;
CARD32 mode1Res1 = 0, mode1Res2 = 0, oldVal1 = 0;
@ -290,248 +290,184 @@ void ix86PciSelectCfgmech(void)
beenhere = TRUE;
/*
* Determine if motherboard chipset supports PCI Config Mech 1 or 2
* We rely on xf86Info.pciFlags to tell which mechanisms to try....
*/
switch (xf86Info.pciFlags) {
case PCIOsConfig:
case PCIProbe1:
if (!xf86EnableIO())
return;
/* Determine if motherboard chipset supports PCI Config Mech 1 or 2 */
do {
if (!xf86EnableIO())
return;
xf86MsgVerb(X_INFO, 2,
"PCI: Probing config type using method 1\n");
oldVal1 = inl(PCI_CFGMECH1_ADDRESS_REG);
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("Checking config type 1:\n"
"\tinitial value of MODE1_ADDR_REG is 0x%08x\n", oldVal1);
ErrorF("\tChecking that all bits in mask 0x7f000000 are clear\n");
}
#endif
/* Assuming config type 1 to start with */
if ((oldVal1 & 0x7f000000) == 0) {
stages |= 0x01;
xf86MsgVerb(X_INFO, 2,
"PCI: Probing config type using method 1\n");
oldVal1 = inl(PCI_CFGMECH1_ADDRESS_REG);
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tValue indicates possibly config type 1\n");
ErrorF("\tWriting 32-bit value 0x%08x to MODE1_ADDR_REG\n", PCI_EN);
#if 0
ErrorF("\tWriting 8-bit value 0x00 to MODE1_ADDR_REG + 3\n");
#endif
ErrorF("Checking config type 1:\n"
"\tinitial value of MODE1_ADDR_REG is 0x%08x\n", oldVal1);
ErrorF("\tChecking that all bits in mask 0x7f000000 are clear\n");
}
#endif
ix86Pci0.configMech = PCI_CFG_MECH_1;
ix86Pci0.numDevices = PCI_CFGMECH1_MAXDEV;
ix86Pci0.funcs = &ix86Funcs1;
/* Assuming config type 1 to start with */
if ((oldVal1 & 0x7f000000) == 0) {
outl(PCI_CFGMECH1_ADDRESS_REG, PCI_EN);
#if 0
/*
* This seems to cause some Neptune-based PCI machines to switch
* from config type 1 to config type 2
*/
outb(PCI_CFGMECH1_ADDRESS_REG + 3, 0);
#endif
mode1Res1 = inl(PCI_CFGMECH1_ADDRESS_REG);
stages |= 0x01;
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tValue read back from MODE1_ADDR_REG is 0x%08x\n",
if (xf86Verbose > 2) {
ErrorF("\tValue indicates possibly config type 1\n");
ErrorF("\tWriting 32-bit value 0x%08x to MODE1_ADDR_REG\n", PCI_EN);
#if 0
ErrorF("\tWriting 8-bit value 0x00 to MODE1_ADDR_REG + 3\n");
#endif
}
#endif
ix86Pci0.configMech = PCI_CFG_MECH_1;
ix86Pci0.numDevices = PCI_CFGMECH1_MAXDEV;
ix86Pci0.funcs = &ix86Funcs1;
outl(PCI_CFGMECH1_ADDRESS_REG, PCI_EN);
#if 0
/*
* This seems to cause some Neptune-based PCI machines to switch
* from config type 1 to config type 2
*/
outb(PCI_CFGMECH1_ADDRESS_REG + 3, 0);
#endif
mode1Res1 = inl(PCI_CFGMECH1_ADDRESS_REG);
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tValue read back from MODE1_ADDR_REG is 0x%08x\n",
mode1Res1);
ErrorF("\tRestoring original contents of MODE1_ADDR_REG\n");
}
ErrorF("\tRestoring original contents of MODE1_ADDR_REG\n");
}
#endif
outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1);
outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1);
if (mode1Res1) {
if (mode1Res1) {
stages |= 0x02;
stages |= 0x02;
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tValue read back is non-zero, and indicates possible"
" config type 1\n");
}
#endif
if (ix86PciBusCheck()) {
#ifdef DEBUGPCI
if (xf86Verbose > 2)
ErrorF("\tBus check Confirms this: ");
#endif
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n");
xf86MsgVerb(X_INFO, 3,
"PCI: stages = 0x%02x, oldVal1 = 0x%08lx, mode1Res1"
" = 0x%08lx\n", stages, (unsigned long)oldVal1,
(unsigned long)mode1Res1);
return;
}
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tBus check fails to confirm this, continuing type 1"
" check ...\n");
}
#endif
}
stages |= 0x04;
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tValue read back is non-zero, and indicates possible"
" config type 1\n");
ErrorF("\tWriting 0xff000001 to MODE1_ADDR_REG\n");
}
#endif
if (ix86PciBusCheck()) {
#ifdef DEBUGPCI
if (xf86Verbose > 2)
ErrorF("\tBus check Confirms this: ");
#endif
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n");
xf86MsgVerb(X_INFO, 3,
"PCI: stages = 0x%02x, oldVal1 = 0x%08lx, mode1Res1"
" = 0x%08lx\n", stages, (unsigned long)oldVal1,
(unsigned long)mode1Res1);
return;
}
outl(PCI_CFGMECH1_ADDRESS_REG, 0xff000001);
mode1Res2 = inl(PCI_CFGMECH1_ADDRESS_REG);
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tBus check fails to confirm this, continuing type 1"
" check ...\n");
}
#endif
}
stages |= 0x04;
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tWriting 0xff000001 to MODE1_ADDR_REG\n");
}
#endif
outl(PCI_CFGMECH1_ADDRESS_REG, 0xff000001);
mode1Res2 = inl(PCI_CFGMECH1_ADDRESS_REG);
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tValue read back from MODE1_ADDR_REG is 0x%08x\n",
ErrorF("\tValue read back from MODE1_ADDR_REG is 0x%08x\n",
mode1Res2);
ErrorF("\tRestoring original contents of MODE1_ADDR_REG\n");
}
ErrorF("\tRestoring original contents of MODE1_ADDR_REG\n");
}
#endif
outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1);
outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1);
if ((mode1Res2 & 0x80000001) == 0x80000000) {
if ((mode1Res2 & 0x80000001) == 0x80000000) {
stages |= 0x08;
stages |= 0x08;
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tValue read back has only the msb set\n"
"\tThis indicates possible config type 1\n");
}
if (xf86Verbose > 2) {
ErrorF("\tValue read back has only the msb set\n"
"\tThis indicates possible config type 1\n");
}
#endif
if (ix86PciBusCheck()) {
if (ix86PciBusCheck()) {
#ifdef DEBUGPCI
if (xf86Verbose > 2)
ErrorF("\tBus check Confirms this: ");
if (xf86Verbose > 2)
ErrorF("\tBus check Confirms this: ");
#endif
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n");
xf86MsgVerb(X_INFO, 3,
"PCI: stages = 0x%02x, oldVal1 = 0x%08lx,\n"
"\tmode1Res1 = 0x%08lx, mode1Res2 = 0x%08lx\n",
stages, (unsigned long)oldVal1,
(unsigned long)mode1Res1, (unsigned long)mode1Res2);
return;
}
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n");
xf86MsgVerb(X_INFO, 3,
"PCI: stages = 0x%02x, oldVal1 = 0x%08lx,\n"
"\tmode1Res1 = 0x%08lx, mode1Res2 = 0x%08lx\n",
stages, (unsigned long)oldVal1,
(unsigned long)mode1Res1, (unsigned long)mode1Res2);
return;
}
#ifdef DEBUGPCI
if (xf86Verbose > 2) {
ErrorF("\tBus check fails to confirm this.\n");
}
if (xf86Verbose > 2) {
ErrorF("\tBus check fails to confirm this.\n");
}
#endif
}
}
xf86MsgVerb(X_INFO, 3, "PCI: Standard check for type 1 failed.\n");
xf86MsgVerb(X_INFO, 3, "PCI: stages = 0x%02x, oldVal1 = 0x%08lx,\n"
"\tmode1Res1 = 0x%08lx, mode1Res2 = 0x%08lx\n",
stages, (unsigned long)oldVal1, (unsigned long)mode1Res1,
(unsigned long)mode1Res2);
/* Try config type 2 */
oldVal2 = inb(PCI_CFGMECH2_ENABLE_REG);
if ((oldVal2 & 0xf0) == 0) {
ix86Pci0.configMech = PCI_CFG_MECH_2;
ix86Pci0.numDevices = PCI_CFGMECH2_MAXDEV;
ix86Pci0.funcs = &ix86Funcs2;
outb(PCI_CFGMECH2_ENABLE_REG, 0x0e);
mode2Res1 = inb(PCI_CFGMECH2_ENABLE_REG);
outb(PCI_CFGMECH2_ENABLE_REG, oldVal2);
if (mode2Res1 == 0x0e) {
if (ix86PciBusCheck()) {
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 2\n");
return;
}
}
}
break; /* } */
case PCIProbe2: /* { */
if (!xf86EnableIO())
return;
xf86MsgVerb(X_INFO, 3, "PCI: Standard check for type 1 failed.\n");
xf86MsgVerb(X_INFO, 3, "PCI: stages = 0x%02x, oldVal1 = 0x%08lx,\n"
"\tmode1Res1 = 0x%08lx, mode1Res2 = 0x%08lx\n",
stages, (unsigned long)oldVal1, (unsigned long)mode1Res1,
(unsigned long)mode1Res2);
/* The scanpci-style detection method */
/* Try config type 2 */
oldVal2 = inb(PCI_CFGMECH2_ENABLE_REG);
if ((oldVal2 & 0xf0) == 0) {
ix86Pci0.configMech = PCI_CFG_MECH_2;
ix86Pci0.numDevices = PCI_CFGMECH2_MAXDEV;
ix86Pci0.funcs = &ix86Funcs2;
xf86MsgVerb(X_INFO, 2, "PCI: Probing config type using method 2\n");
outb(PCI_CFGMECH2_ENABLE_REG, 0x0e);
mode2Res1 = inb(PCI_CFGMECH2_ENABLE_REG);
outb(PCI_CFGMECH2_ENABLE_REG, oldVal2);
outb(PCI_CFGMECH2_ENABLE_REG, 0x00);
outb(PCI_CFGMECH2_FORWARD_REG, 0x00);
mode2Res1 = inb(PCI_CFGMECH2_ENABLE_REG);
mode2Res2 = inb(PCI_CFGMECH2_FORWARD_REG);
if (mode2Res1 == 0 && mode2Res2 == 0) {
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 2\n");
ix86Pci0.configMech = PCI_CFG_MECH_2;
ix86Pci0.numDevices = PCI_CFGMECH2_MAXDEV;
ix86Pci0.funcs = &ix86Funcs2;
return;
}
oldVal1 = inl(PCI_CFGMECH1_ADDRESS_REG);
outl(PCI_CFGMECH1_ADDRESS_REG, PCI_EN);
mode1Res1 = inl(PCI_CFGMECH1_ADDRESS_REG);
outl(PCI_CFGMECH1_ADDRESS_REG, oldVal1);
if (mode1Res1 == PCI_EN) {
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 1\n");
ix86Pci0.configMech = PCI_CFG_MECH_1;
ix86Pci0.numDevices = PCI_CFGMECH1_MAXDEV;
ix86Pci0.funcs = &ix86Funcs1;
return;
}
break; /* } */
case PCIForceConfig1:
if (!xf86EnableIO())
return;
xf86MsgVerb(X_INFO, 2, "PCI: Forcing config type 1\n");
ix86Pci0.configMech = PCI_CFG_MECH_1;
ix86Pci0.numDevices = PCI_CFGMECH1_MAXDEV;
ix86Pci0.funcs = &ix86Funcs1;
return;
case PCIForceConfig2:
if (!xf86EnableIO())
return;
xf86MsgVerb(X_INFO, 2, "PCI: Forcing config type 2\n");
ix86Pci0.configMech = PCI_CFG_MECH_2;
ix86Pci0.numDevices = PCI_CFGMECH2_MAXDEV;
ix86Pci0.funcs = &ix86Funcs2;
return;
case PCIForceNone:
if (mode2Res1 == 0x0e) {
if (ix86PciBusCheck()) {
xf86MsgVerb(X_INFO, 2, "PCI: Config type is 2\n");
return;
}
}
}
break;
}
} while (0);
/* No PCI found */
ix86Pci0.configMech = PCI_CFG_MECH_UNKNOWN;
xf86MsgVerb(X_INFO, 2, "PCI: No PCI bus found or probed for\n");
xf86MsgVerb(X_INFO, 2, "PCI: No PCI bus found\n");
}
#if 0

17
hw/xfree86/os-support/bus/linuxPci.c
View File

@ -103,20 +103,19 @@ static pointer DomainMmappedIO[MAX_DOMAINS];
void
linuxPciInit(void)
{
struct stat st;
struct stat st;
#ifndef INCLUDE_XF86_NO_DOMAIN
(void) memset(DomainMmappedIO, 0, sizeof(DomainMmappedIO));
#endif
if ((xf86Info.pciFlags == PCIForceNone) ||
(-1 == stat("/proc/bus/pci", &st))) {
/* when using this as default for all linux architectures,
we'll need a fallback for 2.0 kernels here */
return;
}
pciNumBuses = 1;
pciBusInfo[0] = &linuxPci0;
if (-1 == stat("/proc/bus/pci", &st)) {
/* when using this as default for all linux architectures,
we'll need a fallback for 2.0 kernels here */
return;
}
pciNumBuses = 1;
pciBusInfo[0] = &linuxPci0;
}
/**