f350909d16
Code added in hw/xfree86/modes came from the server-1.3-branch. Portions of this code had previously been integrated into xf86Mode.c and edid_modes.c. To preserve hw/xfree86/modes as much as possible, the duplicate code from the other files has been disabled; a more careful review would figure out where that code actually belonged.
491 lines
15 KiB
C
491 lines
15 KiB
C
/*
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* Copyright 2006 Luc Verhaegen.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sub license,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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/**
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* @file This is a copy of edid_modes.c from the X Server, for compatibility
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* with old X Servers.
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*/
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#ifdef HAVE_XORG_CONFIG_H
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#include <xorg-config.h>
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#else
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#ifdef HAVE_CONFIG_H
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#include <config.h>
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#endif
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#endif
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#include "xf86.h"
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#include "xf86DDC.h"
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#include <X11/Xatom.h>
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#include "property.h"
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#include "propertyst.h"
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#include "xf86DDC.h"
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#include "xf86Crtc.h"
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#include <string.h>
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#include <math.h>
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/*
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* Quirks to work around broken EDID data from various monitors.
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*/
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typedef enum {
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DDC_QUIRK_NONE = 0,
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/* Force detailed sync polarity to -h +v */
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DDC_QUIRK_DT_SYNC_HM_VP = 1 << 0,
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/* First detailed mode is bogus, prefer largest mode at 60hz */
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DDC_QUIRK_PREFER_LARGE_60 = 1 << 1,
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/* 135MHz clock is too high, drop a bit */
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DDC_QUIRK_135_CLOCK_TOO_HIGH = 1 << 2
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} ddc_quirk_t;
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static Bool quirk_dt_sync_hm_vp (int scrnIndex, xf86MonPtr DDC)
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{
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/* Belinea 1924S1W */
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if (memcmp (DDC->vendor.name, "MAX", 4) == 0 &&
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DDC->vendor.prod_id == 1932)
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return TRUE;
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/* Belinea 10 20 30W */
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if (memcmp (DDC->vendor.name, "MAX", 4) == 0 &&
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DDC->vendor.prod_id == 2007)
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return TRUE;
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/* ViewSonic VX2025wm (bug #9941) */
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if (memcmp (DDC->vendor.name, "VSC", 4) == 0 &&
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DDC->vendor.prod_id == 58653)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_prefer_large_60 (int scrnIndex, xf86MonPtr DDC)
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{
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/* Belinea 10 15 55 */
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if (memcmp (DDC->vendor.name, "MAX", 4) == 0 &&
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DDC->vendor.prod_id == 1516)
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return TRUE;
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return FALSE;
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}
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static Bool quirk_135_clock_too_high (int scrnIndex, xf86MonPtr DDC)
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{
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/* Envision Peripherals, Inc. EN-7100e. See bug #9550. */
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if (memcmp (DDC->vendor.name, "EPI", 4) == 0 &&
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DDC->vendor.prod_id == 59264)
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return TRUE;
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return FALSE;
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}
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typedef struct {
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Bool (*detect) (int scrnIndex, xf86MonPtr DDC);
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ddc_quirk_t quirk;
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char *description;
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} ddc_quirk_map_t;
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static const ddc_quirk_map_t ddc_quirks[] = {
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{
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quirk_dt_sync_hm_vp, DDC_QUIRK_DT_SYNC_HM_VP,
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"Set detailed timing sync polarity to -h +v"
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},
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{
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quirk_prefer_large_60, DDC_QUIRK_PREFER_LARGE_60,
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"Detailed timing is not preferred, use largest mode at 60Hz"
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},
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{
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quirk_135_clock_too_high, DDC_QUIRK_135_CLOCK_TOO_HIGH,
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"Recommended 135MHz pixel clock is too high"
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},
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{
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NULL, DDC_QUIRK_NONE,
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"No known quirks"
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},
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};
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/*
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* TODO:
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* - for those with access to the VESA DMT standard; review please.
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*/
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#define MODEPREFIX(name) NULL, NULL, name, 0,M_T_DRIVER
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#define MODESUFFIX 0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,FALSE,FALSE,0,NULL,0,0.0,0.0
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static DisplayModeRec DDCEstablishedModes[17] = {
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{ MODEPREFIX("800x600"), 40000, 800, 840, 968, 1056, 0, 600, 601, 605, 628, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@60Hz */
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{ MODEPREFIX("800x600"), 36000, 800, 824, 896, 1024, 0, 600, 601, 603, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@56Hz */
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{ MODEPREFIX("640x480"), 31500, 640, 656, 720, 840, 0, 480, 481, 484, 500, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@75Hz */
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{ MODEPREFIX("640x480"), 31500, 640, 664, 704, 832, 0, 480, 489, 491, 520, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@72Hz */
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{ MODEPREFIX("640x480"), 30240, 640, 704, 768, 864, 0, 480, 483, 486, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@67Hz */
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{ MODEPREFIX("640x480"), 25200, 640, 656, 752, 800, 0, 480, 490, 492, 525, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 640x480@60Hz */
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{ MODEPREFIX("720x400"), 35500, 720, 738, 846, 900, 0, 400, 421, 423, 449, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 720x400@88Hz */
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{ MODEPREFIX("720x400"), 28320, 720, 738, 846, 900, 0, 400, 412, 414, 449, 0, V_NHSYNC | V_PVSYNC, MODESUFFIX }, /* 720x400@70Hz */
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{ MODEPREFIX("1280x1024"), 135000, 1280, 1296, 1440, 1688, 0, 1024, 1025, 1028, 1066, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1280x1024@75Hz */
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{ MODEPREFIX("1024x768"), 78800, 1024, 1040, 1136, 1312, 0, 768, 769, 772, 800, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1024x768@75Hz */
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{ MODEPREFIX("1024x768"), 75000, 1024, 1048, 1184, 1328, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@70Hz */
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{ MODEPREFIX("1024x768"), 65000, 1024, 1048, 1184, 1344, 0, 768, 771, 777, 806, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 1024x768@60Hz */
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{ MODEPREFIX("1024x768"), 44900, 1024, 1032, 1208, 1264, 0, 768, 768, 776, 817, 0, V_PHSYNC | V_PVSYNC | V_INTERLACE, MODESUFFIX }, /* 1024x768@43Hz */
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{ MODEPREFIX("832x624"), 57284, 832, 864, 928, 1152, 0, 624, 625, 628, 667, 0, V_NHSYNC | V_NVSYNC, MODESUFFIX }, /* 832x624@75Hz */
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{ MODEPREFIX("800x600"), 49500, 800, 816, 896, 1056, 0, 600, 601, 604, 625, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@75Hz */
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{ MODEPREFIX("800x600"), 50000, 800, 856, 976, 1040, 0, 600, 637, 643, 666, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 800x600@72Hz */
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{ MODEPREFIX("1152x864"), 108000, 1152, 1216, 1344, 1600, 0, 864, 865, 868, 900, 0, V_PHSYNC | V_PVSYNC, MODESUFFIX }, /* 1152x864@75Hz */
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};
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static DisplayModePtr
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DDCModesFromEstablished(int scrnIndex, struct established_timings *timing,
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ddc_quirk_t quirks)
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{
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DisplayModePtr Modes = NULL, Mode = NULL;
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CARD32 bits = (timing->t1) | (timing->t2 << 8) |
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((timing->t_manu & 0x80) << 9);
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int i;
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for (i = 0; i < 17; i++) {
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if (bits & (0x01 << i)) {
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Mode = xf86DuplicateMode(&DDCEstablishedModes[i]);
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Modes = xf86ModesAdd(Modes, Mode);
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}
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}
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return Modes;
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}
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/*
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*
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*/
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static DisplayModePtr
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DDCModesFromStandardTiming(int scrnIndex, struct std_timings *timing,
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ddc_quirk_t quirks)
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{
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DisplayModePtr Modes = NULL, Mode = NULL;
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int i;
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for (i = 0; i < STD_TIMINGS; i++) {
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if (timing[i].hsize && timing[i].vsize && timing[i].refresh) {
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Mode = xf86CVTMode(timing[i].hsize, timing[i].vsize,
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timing[i].refresh, FALSE, FALSE);
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Mode->type = M_T_DRIVER;
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Modes = xf86ModesAdd(Modes, Mode);
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}
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}
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return Modes;
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}
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/*
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*
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*/
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static DisplayModePtr
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DDCModeFromDetailedTiming(int scrnIndex, struct detailed_timings *timing,
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int preferred, ddc_quirk_t quirks)
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{
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DisplayModePtr Mode;
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/* We don't do stereo */
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if (timing->stereo) {
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xf86DrvMsg(scrnIndex, X_INFO,
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"%s: Ignoring: We don't handle stereo.\n", __func__);
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return NULL;
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}
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/* We only do seperate sync currently */
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if (timing->sync != 0x03) {
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xf86DrvMsg(scrnIndex, X_INFO,
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"%s: %dx%d Warning: We only handle seperate"
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" sync.\n", __func__, timing->h_active, timing->v_active);
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}
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Mode = xnfalloc(sizeof(DisplayModeRec));
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memset(Mode, 0, sizeof(DisplayModeRec));
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Mode->type = M_T_DRIVER;
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if (preferred)
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Mode->type |= M_T_PREFERRED;
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if( ( quirks & DDC_QUIRK_135_CLOCK_TOO_HIGH ) &&
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timing->clock == 135000000 )
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Mode->Clock = 108880;
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else
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Mode->Clock = timing->clock / 1000.0;
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Mode->HDisplay = timing->h_active;
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Mode->HSyncStart = timing->h_active + timing->h_sync_off;
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Mode->HSyncEnd = Mode->HSyncStart + timing->h_sync_width;
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Mode->HTotal = timing->h_active + timing->h_blanking;
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Mode->VDisplay = timing->v_active;
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Mode->VSyncStart = timing->v_active + timing->v_sync_off;
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Mode->VSyncEnd = Mode->VSyncStart + timing->v_sync_width;
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Mode->VTotal = timing->v_active + timing->v_blanking;
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xf86SetModeDefaultName(Mode);
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/* We ignore h/v_size and h/v_border for now. */
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if (timing->interlaced)
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Mode->Flags |= V_INTERLACE;
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if (quirks & DDC_QUIRK_DT_SYNC_HM_VP)
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Mode->Flags |= V_NHSYNC | V_PVSYNC;
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else
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{
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if (timing->misc & 0x02)
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Mode->Flags |= V_PHSYNC;
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else
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Mode->Flags |= V_NHSYNC;
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if (timing->misc & 0x01)
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Mode->Flags |= V_PVSYNC;
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else
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Mode->Flags |= V_NVSYNC;
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}
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return Mode;
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}
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/*
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*
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*/
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static void
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DDCGuessRangesFromModes(int scrnIndex, MonPtr Monitor, DisplayModePtr Modes)
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{
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DisplayModePtr Mode = Modes;
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if (!Monitor || !Modes)
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return;
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/* set up the ranges for scanning through the modes */
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Monitor->nHsync = 1;
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Monitor->hsync[0].lo = 1024.0;
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Monitor->hsync[0].hi = 0.0;
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Monitor->nVrefresh = 1;
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Monitor->vrefresh[0].lo = 1024.0;
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Monitor->vrefresh[0].hi = 0.0;
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while (Mode) {
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if (!Mode->HSync)
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Mode->HSync = ((float) Mode->Clock ) / ((float) Mode->HTotal);
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if (!Mode->VRefresh)
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Mode->VRefresh = (1000.0 * ((float) Mode->Clock)) /
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((float) (Mode->HTotal * Mode->VTotal));
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if (Mode->HSync < Monitor->hsync[0].lo)
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Monitor->hsync[0].lo = Mode->HSync;
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if (Mode->HSync > Monitor->hsync[0].hi)
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Monitor->hsync[0].hi = Mode->HSync;
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if (Mode->VRefresh < Monitor->vrefresh[0].lo)
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Monitor->vrefresh[0].lo = Mode->VRefresh;
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if (Mode->VRefresh > Monitor->vrefresh[0].hi)
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Monitor->vrefresh[0].hi = Mode->VRefresh;
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Mode = Mode->next;
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}
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}
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DisplayModePtr
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xf86DDCGetModes(int scrnIndex, xf86MonPtr DDC)
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{
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int preferred, i;
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DisplayModePtr Modes = NULL, Mode;
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ddc_quirk_t quirks;
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xf86DrvMsg (scrnIndex, X_INFO, "EDID vendor \"%s\", prod id %d\n",
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DDC->vendor.name, DDC->vendor.prod_id);
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quirks = DDC_QUIRK_NONE;
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for (i = 0; ddc_quirks[i].detect; i++)
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if (ddc_quirks[i].detect (scrnIndex, DDC))
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{
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xf86DrvMsg (scrnIndex, X_INFO, " EDID quirk: %s\n",
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ddc_quirks[i].description);
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quirks |= ddc_quirks[i].quirk;
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}
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preferred = PREFERRED_TIMING_MODE(DDC->features.msc);
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if (quirks & DDC_QUIRK_PREFER_LARGE_60)
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preferred = 0;
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for (i = 0; i < DET_TIMINGS; i++) {
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struct detailed_monitor_section *det_mon = &DDC->det_mon[i];
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switch (det_mon->type) {
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case DT:
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Mode = DDCModeFromDetailedTiming(scrnIndex,
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&det_mon->section.d_timings,
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preferred,
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quirks);
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preferred = 0;
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Modes = xf86ModesAdd(Modes, Mode);
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break;
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case DS_STD_TIMINGS:
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Mode = DDCModesFromStandardTiming(scrnIndex,
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det_mon->section.std_t,
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quirks);
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Modes = xf86ModesAdd(Modes, Mode);
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break;
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default:
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break;
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}
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}
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/* Add established timings */
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Mode = DDCModesFromEstablished(scrnIndex, &DDC->timings1, quirks);
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Modes = xf86ModesAdd(Modes, Mode);
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/* Add standard timings */
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Mode = DDCModesFromStandardTiming(scrnIndex, DDC->timings2, quirks);
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Modes = xf86ModesAdd(Modes, Mode);
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if (quirks & DDC_QUIRK_PREFER_LARGE_60)
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{
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DisplayModePtr best = Modes;
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for (Mode = Modes; Mode; Mode = Mode->next)
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{
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if (Mode == best) continue;
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if (Mode->HDisplay * Mode->VDisplay > best->HDisplay * best->VDisplay)
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{
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best = Mode;
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continue;
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}
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if (Mode->HDisplay * Mode->VDisplay == best->HDisplay * best->VDisplay)
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{
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double mode_refresh = xf86ModeVRefresh (Mode);
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double best_refresh = xf86ModeVRefresh (best);
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double mode_dist = fabs(mode_refresh - 60.0);
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double best_dist = fabs(best_refresh - 60.0);
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if (mode_dist < best_dist)
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{
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best = Mode;
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continue;
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}
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}
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}
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if (best)
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best->type |= M_T_PREFERRED;
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}
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return Modes;
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}
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/*
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* Fill out MonPtr with xf86MonPtr information.
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*/
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void
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xf86DDCMonitorSet(int scrnIndex, MonPtr Monitor, xf86MonPtr DDC)
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{
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DisplayModePtr Modes = NULL, Mode;
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int i, clock;
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Bool have_hsync = FALSE, have_vrefresh = FALSE;
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if (!Monitor || !DDC)
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return;
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Monitor->DDC = DDC;
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Monitor->widthmm = 10 * DDC->features.hsize;
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Monitor->heightmm = 10 * DDC->features.vsize;
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/* If this is a digital display, then we can use reduced blanking */
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if (DDC->features.input_type)
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Monitor->reducedblanking = TRUE;
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/* Allow the user to also enable this through config */
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Modes = xf86DDCGetModes(scrnIndex, DDC);
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/* Skip EDID ranges if they were specified in the config file */
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have_hsync = (Monitor->nHsync != 0);
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have_vrefresh = (Monitor->nVrefresh != 0);
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/* Go through the detailed monitor sections */
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for (i = 0; i < DET_TIMINGS; i++) {
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switch (DDC->det_mon[i].type) {
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case DS_RANGES:
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if (!have_hsync) {
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if (!Monitor->nHsync)
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xf86DrvMsg(scrnIndex, X_INFO,
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"Using EDID range info for horizontal sync\n");
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Monitor->hsync[Monitor->nHsync].lo =
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DDC->det_mon[i].section.ranges.min_h;
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Monitor->hsync[Monitor->nHsync].hi =
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DDC->det_mon[i].section.ranges.max_h;
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Monitor->nHsync++;
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} else {
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xf86DrvMsg(scrnIndex, X_INFO,
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"Using hsync ranges from config file\n");
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}
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if (!have_vrefresh) {
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if (!Monitor->nVrefresh)
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xf86DrvMsg(scrnIndex, X_INFO,
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"Using EDID range info for vertical refresh\n");
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Monitor->vrefresh[Monitor->nVrefresh].lo =
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DDC->det_mon[i].section.ranges.min_v;
|
|
Monitor->vrefresh[Monitor->nVrefresh].hi =
|
|
DDC->det_mon[i].section.ranges.max_v;
|
|
Monitor->nVrefresh++;
|
|
} else {
|
|
xf86DrvMsg(scrnIndex, X_INFO,
|
|
"Using vrefresh ranges from config file\n");
|
|
}
|
|
|
|
clock = DDC->det_mon[i].section.ranges.max_clock * 1000;
|
|
if (clock > Monitor->maxPixClock)
|
|
Monitor->maxPixClock = clock;
|
|
|
|
break;
|
|
default:
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (Modes) {
|
|
/* Print Modes */
|
|
xf86DrvMsg(scrnIndex, X_INFO, "Printing DDC gathered Modelines:\n");
|
|
|
|
Mode = Modes;
|
|
while (Mode) {
|
|
xf86PrintModeline(scrnIndex, Mode);
|
|
Mode = Mode->next;
|
|
}
|
|
|
|
/* Do we still need ranges to be filled in? */
|
|
if (!Monitor->nHsync || !Monitor->nVrefresh)
|
|
DDCGuessRangesFromModes(scrnIndex, Monitor, Modes);
|
|
|
|
/* look for last Mode */
|
|
Mode = Modes;
|
|
|
|
while (Mode->next)
|
|
Mode = Mode->next;
|
|
|
|
/* add to MonPtr */
|
|
if (Monitor->Modes) {
|
|
Monitor->Last->next = Modes;
|
|
Modes->prev = Monitor->Last;
|
|
Monitor->Last = Mode;
|
|
} else {
|
|
Monitor->Modes = Modes;
|
|
Monitor->Last = Mode;
|
|
}
|
|
}
|
|
}
|