af717ae57d
Avoid PIO access on IA64. Some IA64 machine check if legacy ports outside
the VGA range are accessed. The ATi driver however does this to probe
for ISA Mach8/32/64. Since no IA64 has ISA slots this restriction
should not be relevant to the user.
Avoid recursive calls of xf86scanpci(). This function normally detects that
it has been called before by checking if the PCI structure is filled
out. So far if this was not the case (because PCI probing has failed
for some reason) the function is traversed again. With the chipset
specific PCI bus probing this can lead to an endless recursive loop as
the post-probing code calls xf86scanpci() from within this function.
The OS specific PCI code for Linux worked only if bus 0 was populated as it
checked for the presence of /proc/bus/pci/00. Fixed to check for
/proc/bus/pci/<bus_to_look_for> instead.
597 lines
16 KiB
C
597 lines
16 KiB
C
/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/bus/linuxPci.c,v 1.9 2002/09/24 16:14:16 tsi Exp $ */
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/*
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* Copyright 1998 by Concurrent Computer Corporation
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*
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Concurrent Computer
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* Corporation not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission. Concurrent Computer Corporation makes no representations
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* about the suitability of this software for any purpose. It is
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* provided "as is" without express or implied warranty.
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*
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* CONCURRENT COMPUTER CORPORATION DISCLAIMS ALL WARRANTIES WITH REGARD
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* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS, IN NO EVENT SHALL CONCURRENT COMPUTER CORPORATION BE
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* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* SOFTWARE.
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*
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* Copyright 1998 by Metro Link Incorporated
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*
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* Permission to use, copy, modify, distribute, and sell this software
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* and its documentation for any purpose is hereby granted without fee,
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* provided that the above copyright notice appear in all copies and that
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* both that copyright notice and this permission notice appear in
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* supporting documentation, and that the name of Metro Link
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* Incorporated not be used in advertising or publicity pertaining to
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* distribution of the software without specific, written prior
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* permission. Metro Link Incorporated makes no representations
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* about the suitability of this software for any purpose. It is
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* provided "as is" without express or implied warranty.
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*
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* METRO LINK INCORPORATED DISCLAIMS ALL WARRANTIES WITH REGARD
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* TO THIS SOFTWARE, INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY
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* AND FITNESS, IN NO EVENT SHALL METRO LINK INCORPORATED BE
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* LIABLE FOR ANY SPECIAL, INDIRECT OR CONSEQUENTIAL DAMAGES OR ANY
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* DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS,
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* WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION,
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* ARISING OUT OF OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS
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* SOFTWARE.
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*/
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#include <stdio.h>
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#include "compiler.h"
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#include "xf86.h"
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#include "xf86Priv.h"
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#include "xf86_OSlib.h"
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#include "Pci.h"
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/*
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* linux platform specific PCI access functions -- using /proc/bus/pci
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* needs kernel version 2.2.x
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*/
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static CARD32 linuxPciCfgRead(PCITAG tag, int off);
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static void linuxPciCfgWrite(PCITAG, int off, CARD32 val);
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static void linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits);
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static pciBusFuncs_t linuxFuncs0 = {
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/* pciReadLong */ linuxPciCfgRead,
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/* pciWriteLong */ linuxPciCfgWrite,
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/* pciSetBitsLong */ linuxPciCfgSetBits,
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/* pciAddrHostToBus */ pciAddrNOOP,
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/* pciAddrBusToHost */ pciAddrNOOP
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};
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static pciBusInfo_t linuxPci0 = {
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/* configMech */ PCI_CFG_MECH_OTHER,
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/* numDevices */ 32,
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/* secondary */ FALSE,
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/* primary_bus */ 0,
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#ifdef PowerMAX_OS
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/* ppc_io_base */ 0,
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/* ppc_io_size */ 0,
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#endif
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/* funcs */ &linuxFuncs0,
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/* pciBusPriv */ NULL,
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/* bridge */ NULL
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};
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void
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linuxPciInit()
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{
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struct stat st;
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if ((xf86Info.pciFlags == PCIForceNone) ||
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(-1 == stat("/proc/bus/pci", &st))) {
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/* when using this as default for all linux architectures,
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we'll need a fallback for 2.0 kernels here */
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return;
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}
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pciNumBuses = 1;
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pciBusInfo[0] = &linuxPci0;
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pciFindFirstFP = pciGenFindFirst;
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pciFindNextFP = pciGenFindNext;
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}
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static int
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linuxPciOpenFile(PCITAG tag)
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{
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static int lbus,ldev,lfunc,fd = -1;
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int bus, dev, func;
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char file[32];
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struct stat ignored;
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bus = PCI_BUS_FROM_TAG(tag);
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dev = PCI_DEV_FROM_TAG(tag);
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func = PCI_FUNC_FROM_TAG(tag);
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if (fd == -1 || bus != lbus || dev != ldev || func != lfunc) {
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if (fd != -1)
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close(fd);
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if (bus < 256) {
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sprintf(file,"/proc/bus/pci/%02x",bus);
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if (stat(file, &ignored) < 0)
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sprintf(file, "/proc/bus/pci/0000:%02x/%02x.%1x",
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bus, dev, func);
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else
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sprintf(file, "/proc/bus/pci/%02x/%02x.%1x",
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bus, dev, func);
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} else {
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sprintf(file,"/proc/bus/pci/%04x",bus);
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if (stat(file, &ignored) < 0)
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sprintf(file, "/proc/bus/pci/0000:%04x/%02x.%1x",
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bus, dev, func);
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else
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sprintf(file, "/proc/bus/pci/%04x/%02x.%1x",
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bus, dev, func);
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}
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fd = open(file,O_RDWR);
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lbus = bus;
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ldev = dev;
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lfunc = func;
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}
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return fd;
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}
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static CARD32
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linuxPciCfgRead(PCITAG tag, int off)
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{
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int fd;
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CARD32 val = 0xffffffff;
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if (-1 != (fd = linuxPciOpenFile(tag))) {
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lseek(fd,off,SEEK_SET);
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read(fd,&val,4);
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}
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return PCI_CPU(val);
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}
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static void
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linuxPciCfgWrite(PCITAG tag, int off, CARD32 val)
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{
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int fd;
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if (-1 != (fd = linuxPciOpenFile(tag))) {
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lseek(fd,off,SEEK_SET);
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val = PCI_CPU(val);
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write(fd,&val,4);
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}
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}
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static void
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linuxPciCfgSetBits(PCITAG tag, int off, CARD32 mask, CARD32 bits)
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{
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int fd;
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CARD32 val = 0xffffffff;
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if (-1 != (fd = linuxPciOpenFile(tag))) {
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lseek(fd,off,SEEK_SET);
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read(fd,&val,4);
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val = PCI_CPU(val);
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val = (val & ~mask) | (bits & mask);
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val = PCI_CPU(val);
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lseek(fd,off,SEEK_SET);
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write(fd,&val,4);
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}
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}
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#ifndef INCLUDE_XF86_NO_DOMAIN
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/*
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* Compiling the following simply requires the presence of <linux/pci.c>.
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* Actually running this is another matter altogether...
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*
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* This scheme requires that the kernel allow mmap()'ing of a host bridge's I/O
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* and memory spaces through its /proc/bus/pci/BUS/DFN entry. Which one is
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* determined by a prior ioctl().
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*
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* For the sparc64 port, this means 2.4.12 or later. For ppc, this
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* functionality is almost, but not quite there yet. Alpha and other kernel
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* ports to multi-domain architectures still need to implement this.
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*
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* This scheme is also predicated on the use of an IOADDRESS compatible type to
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* designate I/O addresses. Although IOADDRESS is defined as an unsigned
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* integral type, it is actually the virtual address of, i.e. a pointer to, the
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* I/O port to access. And so, the inX/outX macros in "compiler.h" need to be
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* #define'd appropriately (as is done on SPARC's).
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*
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* Another requirement to port this scheme to another multi-domain architecture
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* is to add the appropriate entries in the pciControllerSizes array below.
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*
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* TO DO: Address the deleterious reaction some host bridges have to master
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* aborts. This is already done for secondary PCI buses, but not yet
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* for accesses to primary buses (except for the SPARC port, where
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* master aborts are avoided during PCI scans).
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*/
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#include <linux/pci.h>
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#ifndef PCIIOC_BASE /* Ioctls for /proc/bus/pci/X/Y nodes. */
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#define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8)
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/* Get controller for PCI device. */
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#define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00)
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/* Set mmap state to I/O space. */
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#define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01)
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/* Set mmap state to MEM space. */
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#define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02)
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/* Enable/disable write-combining. */
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#define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03)
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#endif
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/* This probably shouldn't be Linux-specific */
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static pciConfigPtr
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xf86GetPciHostConfigFromTag(PCITAG Tag)
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{
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int bus = PCI_BUS_FROM_TAG(Tag);
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pciBusInfo_t *pBusInfo;
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while ((bus < pciNumBuses) && (pBusInfo = pciBusInfo[bus])) {
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if (bus == pBusInfo->primary_bus)
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return pBusInfo->bridge;
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bus = pBusInfo->primary_bus;
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}
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return NULL; /* Bad data */
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}
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/*
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* This is ugly, but until I can extract this information from the kernel,
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* it'll have to do. The default I/O space size is 64K, and 4G for memory.
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* Anything else needs to go in this table. (PowerPC folk take note.)
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*
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* Note that Linux/SPARC userland is 32-bit, so 4G overflows to zero here.
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*
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* Please keep this table in ascending vendor/device order.
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*/
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static struct pciSizes {
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unsigned short vendor, device;
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unsigned long io_size, mem_size;
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} pciControllerSizes[] = {
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{
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PCI_VENDOR_SUN, PCI_CHIP_PSYCHO,
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1U << 16, 1U << 31
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},
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{
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PCI_VENDOR_SUN, PCI_CHIP_SCHIZO,
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1U << 24, 1U << 31 /* ??? */
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},
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{
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PCI_VENDOR_SUN, PCI_CHIP_SABRE,
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1U << 24, (unsigned long)(1ULL << 32)
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},
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{
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PCI_VENDOR_SUN, PCI_CHIP_HUMMINGBIRD,
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1U << 24, (unsigned long)(1ULL << 32)
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}
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};
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#define NUM_SIZES (sizeof(pciControllerSizes) / sizeof(pciControllerSizes[0]))
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static unsigned long
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linuxGetIOSize(PCITAG Tag)
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{
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pciConfigPtr pPCI;
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int i;
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/* Find host bridge */
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if ((pPCI = xf86GetPciHostConfigFromTag(Tag))) {
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/* Look up vendor/device */
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for (i = 0; i < NUM_SIZES; i++) {
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if (pPCI->pci_vendor > pciControllerSizes[i].vendor)
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continue;
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if (pPCI->pci_vendor < pciControllerSizes[i].vendor)
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break;
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if (pPCI->pci_device > pciControllerSizes[i].device)
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continue;
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if (pPCI->pci_device < pciControllerSizes[i].device)
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break;
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return pciControllerSizes[i].io_size;
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}
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}
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return 1U << 16; /* Default to 64K */
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}
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static void
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linuxGetSizes(PCITAG Tag, unsigned long *io_size, unsigned long *mem_size)
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{
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pciConfigPtr pPCI;
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int i;
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*io_size = (1U << 16); /* Default to 64K */
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*mem_size = (unsigned long)(1ULL << 32); /* Default to 4G */
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/* Find host bridge */
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if ((pPCI = xf86GetPciHostConfigFromTag(Tag))) {
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/* Look up vendor/device */
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for (i = 0; i < NUM_SIZES; i++) {
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if (pPCI->pci_vendor > pciControllerSizes[i].vendor)
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continue;
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if (pPCI->pci_vendor < pciControllerSizes[i].vendor)
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break;
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if (pPCI->pci_device > pciControllerSizes[i].device)
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continue;
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if (pPCI->pci_device < pciControllerSizes[i].device)
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break;
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*io_size = pciControllerSizes[i].io_size;
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*mem_size = pciControllerSizes[i].mem_size;
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break;
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}
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}
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}
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int
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xf86GetPciDomain(PCITAG Tag)
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{
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pciConfigPtr pPCI;
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int fd, result;
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pPCI = xf86GetPciHostConfigFromTag(Tag);
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if (pPCI && (result = PCI_DOM_FROM_BUS(pPCI->busnum)))
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return result;
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if ((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0)) < 0)
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return 0;
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if ((result = ioctl(fd, PCIIOC_CONTROLLER, 0)) < 0)
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return 0;
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return result + 1; /* Domain 0 is reserved */
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}
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static pointer
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linuxMapPci(int ScreenNum, int Flags, PCITAG Tag,
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ADDRESS Base, unsigned long Size, int mmap_ioctl)
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{
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do {
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pciConfigPtr pPCI;
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unsigned char *result;
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ADDRESS realBase, Offset;
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int fd, mmapflags, prot;
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xf86InitVidMem();
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pPCI = xf86GetPciHostConfigFromTag(Tag);
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if (((fd = linuxPciOpenFile(pPCI ? pPCI->tag : 0)) < 0) ||
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(ioctl(fd, mmap_ioctl, 0) < 0))
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break;
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/* Note: IA-64 doesn't compile this and doesn't need to */
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#ifdef __ia64__
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# ifndef MAP_WRITECOMBINED
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# define MAP_WRITECOMBINED 0x00010000
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# endif
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# ifndef MAP_NONCACHED
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# define MAP_NONCACHED 0x00020000
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# endif
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if (Flags & VIDMEM_FRAMEBUFFER)
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mmapflags = MAP_SHARED | MAP_WRITECOMBINED;
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else
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mmapflags = MAP_SHARED | MAP_NONCACHED
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#else /* !__ia64__ */
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mmapflags = (Flags & VIDMEM_FRAMEBUFFER) / VIDMEM_FRAMEBUFFER;
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if (ioctl(fd, PCIIOC_WRITE_COMBINE, mmapflags) < 0)
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break;
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mmapflags = MAP_SHARED;
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#endif /* ?__ia64__ */
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/* Align to page boundary */
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realBase = Base & ~(getpagesize() - 1);
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Offset = Base - realBase;
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if (Flags & VIDMEM_READONLY)
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prot = PROT_READ;
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else
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prot = PROT_READ | PROT_WRITE;
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result = mmap(NULL, Size + Offset, prot, mmapflags, fd, realBase);
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if (!result || ((pointer)result == MAP_FAILED))
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FatalError("linuxMapPci() mmap failure: %s\n", strerror(errno));
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xf86MakeNewMapping(ScreenNum, Flags, realBase, Size + Offset, result);
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return result + Offset;
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} while (0);
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if (mmap_ioctl == PCIIOC_MMAP_IS_MEM)
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return xf86MapVidMem(ScreenNum, Flags, Base, Size);
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return NULL;
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}
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pointer
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xf86MapDomainMemory(int ScreenNum, int Flags, PCITAG Tag,
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ADDRESS Base, unsigned long Size)
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{
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return linuxMapPci(ScreenNum, Flags, Tag, Base, Size, PCIIOC_MMAP_IS_MEM);
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}
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#define MAX_DOMAINS 257
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static pointer DomainMmappedIO[MAX_DOMAINS];
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/* This has no means of returning failure, so all errors are fatal */
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IOADDRESS
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xf86MapDomainIO(int ScreenNum, int Flags, PCITAG Tag,
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IOADDRESS Base, unsigned long Size)
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|
{
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int domain = xf86GetPciDomain(Tag);
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if ((domain <= 0) || (domain >= MAX_DOMAINS))
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FatalError("xf86MapDomainIO(): domain out of range\n");
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/* Permanently map all of I/O space */
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if (!DomainMmappedIO[domain]) {
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DomainMmappedIO[domain] = linuxMapPci(ScreenNum, Flags, Tag,
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0, linuxGetIOSize(Tag),
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PCIIOC_MMAP_IS_IO);
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if (!DomainMmappedIO[domain])
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FatalError("xf86MapDomainIO(): mmap() failure\n");
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}
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return (IOADDRESS)DomainMmappedIO[domain] + Base;
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}
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|
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int
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xf86ReadDomainMemory(PCITAG Tag, ADDRESS Base, int Len, unsigned char *Buf)
|
|
{
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|
unsigned char *ptr, *src;
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|
ADDRESS offset;
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|
unsigned long size;
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|
int len, pagemask = getpagesize() - 1;
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|
/* Ensure page boundaries */
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|
offset = Base & ~pagemask;
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|
size = ((Base + Len + pagemask) & ~pagemask) - offset;
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ptr = xf86MapDomainMemory(-1, VIDMEM_READONLY, Tag, offset, size);
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|
|
if (!ptr)
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|
return -1;
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/* Using memcpy() here can hang the system */
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src = ptr + (Base - offset);
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|
for (len = Len; len-- > 0;)
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*Buf++ = *src++;
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xf86UnMapVidMem(-1, ptr, size);
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return Len;
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}
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|
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resPtr
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|
xf86BusAccWindowsFromOS(void)
|
|
{
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|
pciConfigPtr *ppPCI, pPCI;
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|
resPtr pRes = NULL;
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|
resRange range;
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|
unsigned long io_size, mem_size;
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int domain;
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if ((ppPCI = xf86scanpci(0))) {
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for (; (pPCI = *ppPCI); ppPCI++) {
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|
if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) ||
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(pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST))
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|
continue;
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|
|
domain = xf86GetPciDomain(pPCI->tag);
|
|
linuxGetSizes(pPCI->tag, &io_size, &mem_size);
|
|
|
|
RANGE(range, 0, (ADDRESS)(mem_size - 1),
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
RANGE(range, 0, (IOADDRESS)(io_size - 1),
|
|
RANGE_TYPE(ResExcIoBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
if (domain <= 0)
|
|
break;
|
|
}
|
|
}
|
|
|
|
return pRes;
|
|
}
|
|
|
|
resPtr
|
|
xf86PciBusAccWindowsFromOS(void)
|
|
{
|
|
pciConfigPtr *ppPCI, pPCI;
|
|
resPtr pRes = NULL;
|
|
resRange range;
|
|
unsigned long io_size, mem_size;
|
|
int domain;
|
|
|
|
if ((ppPCI = xf86scanpci(0))) {
|
|
for (; (pPCI = *ppPCI); ppPCI++) {
|
|
if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) ||
|
|
(pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST))
|
|
continue;
|
|
|
|
domain = xf86GetPciDomain(pPCI->tag);
|
|
linuxGetSizes(pPCI->tag, &io_size, &mem_size);
|
|
|
|
RANGE(range, 0, (ADDRESS)(mem_size - 1),
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
RANGE(range, 0, (IOADDRESS)(io_size - 1),
|
|
RANGE_TYPE(ResExcIoBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
if (domain <= 0)
|
|
break;
|
|
}
|
|
}
|
|
|
|
return pRes;
|
|
}
|
|
|
|
|
|
resPtr
|
|
xf86AccResFromOS(resPtr pRes)
|
|
{
|
|
pciConfigPtr *ppPCI, pPCI;
|
|
resRange range;
|
|
unsigned long io_size, mem_size;
|
|
int domain;
|
|
|
|
if ((ppPCI = xf86scanpci(0))) {
|
|
for (; (pPCI = *ppPCI); ppPCI++) {
|
|
if ((pPCI->pci_base_class != PCI_CLASS_BRIDGE) ||
|
|
(pPCI->pci_sub_class != PCI_SUBCLASS_BRIDGE_HOST))
|
|
continue;
|
|
|
|
domain = xf86GetPciDomain(pPCI->tag);
|
|
linuxGetSizes(pPCI->tag, &io_size, &mem_size);
|
|
|
|
/*
|
|
* At minimum, the top and bottom resources must be claimed, so
|
|
* that resources that are (or appear to be) unallocated can be
|
|
* relocated.
|
|
*/
|
|
RANGE(range, 0x00000000u, 0x0009ffffu,
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
RANGE(range, 0x000c0000u, 0x000effffu,
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
RANGE(range, 0x000f0000u, 0x000fffffu,
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
RANGE(range, (ADDRESS)(mem_size - 1), (ADDRESS)(mem_size - 1),
|
|
RANGE_TYPE(ResExcMemBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
RANGE(range, 0x00000000u, 0x00000000u,
|
|
RANGE_TYPE(ResExcIoBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
RANGE(range, (IOADDRESS)(io_size - 1), (IOADDRESS)(io_size - 1),
|
|
RANGE_TYPE(ResExcIoBlock, domain));
|
|
pRes = xf86AddResToList(pRes, &range, -1);
|
|
|
|
if (domain <= 0)
|
|
break;
|
|
}
|
|
}
|
|
|
|
return pRes;
|
|
}
|
|
|
|
#endif /* !INCLUDE_XF86_NO_DOMAIN */
|