876 lines
26 KiB
C
876 lines
26 KiB
C
/*
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* Copyright © 2003 Eric Anholt
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*
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* Permission to use, copy, modify, distribute, and sell this software and its
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* documentation for any purpose is hereby granted without fee, provided that
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* the above copyright notice appear in all copies and that both that
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* copyright notice and this permission notice appear in supporting
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* documentation, and that the name of Eric Anholt not be used in
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* advertising or publicity pertaining to distribution of the software without
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* specific, written prior permission. Eric Anholt makes no
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* representations about the suitability of this software for any purpose. It
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* is provided "as is" without express or implied warranty.
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*
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* ERIC ANHOLT DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE,
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS, IN NO
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* EVENT SHALL ERIC ANHOLT BE LIABLE FOR ANY SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE,
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* DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
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* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
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* PERFORMANCE OF THIS SOFTWARE.
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*/
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#ifdef HAVE_CONFIG_H
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#include <kdrive-config.h>
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#endif
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#include "ati.h"
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#include "ati_reg.h"
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#include "ati_dma.h"
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#include "ati_draw.h"
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extern ATIScreenInfo *accel_atis;
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extern int sample_count;
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extern float sample_offsets_x[255];
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extern float sample_offsets_y[255];
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static Bool is_transform[2];
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static PictTransform *transform[2];
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struct blendinfo {
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Bool dst_alpha;
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Bool src_alpha;
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CARD32 blend_cntl;
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};
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static struct blendinfo RadeonBlendOp[] = {
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/* Clear */
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{0, 0, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_ZERO},
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/* Src */
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{0, 0, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_ZERO},
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/* Dst */
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{0, 0, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_ONE},
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/* Over */
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{0, 1, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_INV_SRC_ALPHA},
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/* OverReverse */
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{1, 0, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_ONE},
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/* In */
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{1, 0, RADEON_SBLEND_GL_DST_ALPHA | RADEON_DBLEND_GL_ZERO},
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/* InReverse */
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{0, 1, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_SRC_ALPHA},
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/* Out */
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{1, 0, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_ZERO},
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/* OutReverse */
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{0, 1, RADEON_SBLEND_GL_ZERO | RADEON_DBLEND_GL_INV_SRC_ALPHA},
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/* Atop */
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{1, 1, RADEON_SBLEND_GL_DST_ALPHA | RADEON_DBLEND_GL_INV_SRC_ALPHA},
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/* AtopReverse */
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{1, 1, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_SRC_ALPHA},
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/* Xor */
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{1, 1, RADEON_SBLEND_GL_INV_DST_ALPHA | RADEON_DBLEND_GL_INV_SRC_ALPHA},
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/* Add */
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{0, 0, RADEON_SBLEND_GL_ONE | RADEON_DBLEND_GL_ONE},
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};
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struct formatinfo {
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int fmt;
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Bool byte_swap;
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CARD32 card_fmt;
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};
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/* Note on texture formats:
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* TXFORMAT_Y8 expands to (Y,Y,Y,1). TXFORMAT_I8 expands to (I,I,I,I)
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*/
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static struct formatinfo R100TexFormats[] = {
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{PICT_a8r8g8b8, 0, RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP},
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{PICT_x8r8g8b8, 0, RADEON_TXFORMAT_ARGB8888},
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{PICT_a8b8g8r8, 1, RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP},
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{PICT_x8b8g8r8, 1, RADEON_TXFORMAT_RGBA8888},
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{PICT_r5g6b5, 0, RADEON_TXFORMAT_RGB565},
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{PICT_a1r5g5b5, 0, RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP},
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{PICT_x1r5g5b5, 0, RADEON_TXFORMAT_ARGB1555},
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{PICT_a8, 0, RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP},
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};
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static struct formatinfo R200TexFormats[] = {
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{PICT_a8r8g8b8, 0, R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP},
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{PICT_x8r8g8b8, 0, R200_TXFORMAT_ARGB8888},
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{PICT_a8r8g8b8, 1, R200_TXFORMAT_RGBA8888 | R200_TXFORMAT_ALPHA_IN_MAP},
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{PICT_x8r8g8b8, 1, R200_TXFORMAT_RGBA8888},
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{PICT_r5g6b5, 0, R200_TXFORMAT_RGB565},
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{PICT_a1r5g5b5, 0, R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP},
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{PICT_x1r5g5b5, 0, R200_TXFORMAT_ARGB1555},
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{PICT_a8, 0, R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP},
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};
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/* Common Radeon setup code */
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static Bool
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RadeonGetDestFormat(PicturePtr pDstPicture, CARD32 *dst_format)
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{
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switch (pDstPicture->format) {
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case PICT_a8r8g8b8:
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case PICT_x8r8g8b8:
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*dst_format = RADEON_COLOR_FORMAT_ARGB8888;
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break;
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case PICT_r5g6b5:
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*dst_format = RADEON_COLOR_FORMAT_RGB565;
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break;
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case PICT_a1r5g5b5:
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case PICT_x1r5g5b5:
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*dst_format = RADEON_COLOR_FORMAT_ARGB1555;
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break;
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case PICT_a8:
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*dst_format = RADEON_COLOR_FORMAT_RGB8;
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break;
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default:
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ATI_FALLBACK(("Unsupported dest format 0x%x\n",
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pDstPicture->format));
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}
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return TRUE;
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}
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/* R100-specific code */
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static Bool
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R100CheckCompositeTexture(PicturePtr pPict, int unit)
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{
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int w = pPict->pDrawable->width;
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int h = pPict->pDrawable->height;
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int i;
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if ((w > 0x7ff) || (h > 0x7ff))
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ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
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for (i = 0; i < sizeof(R100TexFormats) / sizeof(R100TexFormats[0]); i++)
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{
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if (R100TexFormats[i].fmt == pPict->format)
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break;
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}
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if (i == sizeof(R100TexFormats) / sizeof(R100TexFormats[0]))
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ATI_FALLBACK(("Unsupported picture format 0x%x\n",
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pPict->format));
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if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0))
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ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w, h));
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if (pPict->filter != PictFilterNearest &&
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pPict->filter != PictFilterBilinear)
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ATI_FALLBACK(("Unsupported filter 0x%x\n", pPict->filter));
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return TRUE;
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}
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static Bool
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R100TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
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{
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ATIScreenInfo *atis = accel_atis;
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KdScreenPriv(pPix->drawable.pScreen);
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CARD32 txfilter, txformat, txoffset, txpitch;
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int w = pPict->pDrawable->width;
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int h = pPict->pDrawable->height;
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int i;
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RING_LOCALS;
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txpitch = pPix->devKind;
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txoffset = ((CARD8 *)pPix->devPrivate.ptr -
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pScreenPriv->screen->memory_base);
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for (i = 0; i < sizeof(R100TexFormats) / sizeof(R100TexFormats[0]); i++)
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{
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if (R100TexFormats[i].fmt == pPict->format)
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break;
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}
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txformat = R100TexFormats[i].card_fmt;
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if (R100TexFormats[i].byte_swap)
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txoffset |= RADEON_TXO_ENDIAN_BYTE_SWAP;
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if (pPict->repeat) {
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txformat |= ATILog2(w) << RADEON_TXFORMAT_WIDTH_SHIFT;
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txformat |= ATILog2(h) << RADEON_TXFORMAT_HEIGHT_SHIFT;
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} else
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txformat |= RADEON_TXFORMAT_NON_POWER2;
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txformat |= unit << 24; /* RADEON_TXFORMAT_ST_ROUTE_STQX */
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if ((txoffset & 0x1f) != 0)
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ATI_FALLBACK(("Bad texture offset 0x%x\n", txoffset));
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if ((txpitch & 0x1f) != 0)
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ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch));
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switch (pPict->filter) {
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case PictFilterNearest:
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txfilter = (RADEON_MAG_FILTER_NEAREST |
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RADEON_MIN_FILTER_NEAREST);
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break;
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case PictFilterBilinear:
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txfilter = (RADEON_MAG_FILTER_LINEAR |
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RADEON_MIN_FILTER_LINEAR);
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break;
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default:
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ATI_FALLBACK(("Bad filter 0x%x\n", pPict->filter));
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}
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BEGIN_DMA(7);
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if (unit == 0) {
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OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_0, 3));
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OUT_RING_REG(RADEON_REG_PP_TXFILTER_0, txfilter);
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OUT_RING_REG(RADEON_REG_PP_TXFORMAT_0, txformat);
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OUT_RING_REG(RADEON_REG_PP_TXOFFSET_0, txoffset);
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OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_0, 2));
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OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_0,
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(pPix->drawable.width - 1) |
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((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
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OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_0, txpitch - 32);
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} else {
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OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXFILTER_1, 3));
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OUT_RING_REG(RADEON_REG_PP_TXFILTER_1, txfilter);
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OUT_RING_REG(RADEON_REG_PP_TXFORMAT_1, txformat);
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OUT_RING_REG(RADEON_REG_PP_TXOFFSET_1, txoffset);
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OUT_RING(DMA_PACKET0(RADEON_REG_PP_TEX_SIZE_1, 2));
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OUT_RING_REG(RADEON_REG_PP_TEX_SIZE_1,
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(pPix->drawable.width - 1) |
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((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
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OUT_RING_REG(RADEON_REG_PP_TEX_PITCH_1, txpitch - 32);
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}
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END_DMA();
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if (pPict->transform != 0) {
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is_transform[unit] = TRUE;
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transform[unit] = pPict->transform;
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} else {
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is_transform[unit] = FALSE;
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}
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return TRUE;
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}
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Bool
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R100CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
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PicturePtr pDstPicture)
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{
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CARD32 tmp1;
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/* Check for unsupported compositing operations. */
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if (op >= sizeof(RadeonBlendOp) / sizeof(RadeonBlendOp[0]))
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ATI_FALLBACK(("Unsupported Composite op 0x%x\n", op));
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if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
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RadeonBlendOp[op].src_alpha)
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ATI_FALLBACK(("Component alpha not supported with source "
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"alpha blending.\n"));
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if (pDstPicture->pDrawable->width >= (1 << 11) ||
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pDstPicture->pDrawable->height >= (1 << 11))
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ATI_FALLBACK(("Dest w/h too large (%d,%d).\n",
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pDstPicture->pDrawable->width,
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pDstPicture->pDrawable->height));
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if (!R100CheckCompositeTexture(pSrcPicture, 0))
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return FALSE;
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if (pMaskPicture != NULL && !R100CheckCompositeTexture(pMaskPicture, 1))
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return FALSE;
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if (pDstPicture->componentAlpha)
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return FALSE;
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if (!RadeonGetDestFormat(pDstPicture, &tmp1))
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return FALSE;
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return TRUE;
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}
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Bool
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R100PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
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PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
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{
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KdScreenPriv(pDst->drawable.pScreen);
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ATIScreenInfo(pScreenPriv);
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CARD32 dst_format, dst_offset, dst_pitch;
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CARD32 pp_cntl, blendcntl, cblend, ablend;
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int pixel_shift;
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RING_LOCALS;
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accel_atis = atis;
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RadeonGetDestFormat(pDstPicture, &dst_format);
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pixel_shift = pDst->drawable.bitsPerPixel >> 4;
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dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
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pScreenPriv->screen->memory_base);
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dst_pitch = pDst->devKind;
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if ((dst_offset & 0x0f) != 0)
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ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
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if (((dst_pitch >> pixel_shift) & 0x7) != 0)
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ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
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if (!R100TextureSetup(pSrcPicture, pSrc, 0))
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return FALSE;
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pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
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if (pMask != NULL) {
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if (!R100TextureSetup(pMaskPicture, pMask, 1))
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return FALSE;
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pp_cntl |= RADEON_TEX_1_ENABLE;
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} else {
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is_transform[1] = FALSE;
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}
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ENTER_DRAW(pDst);
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RadeonSwitchTo3D(atis);
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BEGIN_DMA(12);
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OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3));
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OUT_RING_REG(RADEON_REG_PP_CNTL, pp_cntl);
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OUT_RING_REG(RADEON_REG_RB3D_CNTL,
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dst_format | RADEON_ALPHA_BLEND_ENABLE);
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OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
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OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
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/* IN operator: Multiply src by mask components or mask alpha.
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* BLEND_CTL_ADD is A * B + C.
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* If a picture is a8, we have to explicitly zero its color values.
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* If the destination is a8, we have to route the alpha to red, I think.
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*/
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cblend = RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
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RADEON_COLOR_ARG_C_ZERO;
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ablend = RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
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RADEON_ALPHA_ARG_C_ZERO;
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if (pDstPicture->format == PICT_a8)
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cblend |= RADEON_COLOR_ARG_A_T0_ALPHA;
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else if (pSrcPicture->format == PICT_a8)
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cblend |= RADEON_COLOR_ARG_A_ZERO;
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else
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cblend |= RADEON_COLOR_ARG_A_T0_COLOR;
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ablend |= RADEON_ALPHA_ARG_A_T0_ALPHA;
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if (pMask) {
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if (pMaskPicture->componentAlpha &&
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pDstPicture->format != PICT_a8)
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cblend |= RADEON_COLOR_ARG_B_T1_COLOR;
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else
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cblend |= RADEON_COLOR_ARG_B_T1_ALPHA;
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ablend |= RADEON_ALPHA_ARG_B_T1_ALPHA;
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} else {
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cblend |= RADEON_COLOR_ARG_B_ZERO | RADEON_COMP_ARG_B;
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ablend |= RADEON_ALPHA_ARG_B_ZERO | RADEON_COMP_ARG_B;
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}
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OUT_REG(RADEON_REG_PP_TXCBLEND_0, cblend);
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OUT_REG(RADEON_REG_PP_TXABLEND_0, ablend);
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/* Op operator. */
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blendcntl = RadeonBlendOp[op].blend_cntl;
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if (PICT_FORMAT_A(pDstPicture->format) == 0 &&
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RadeonBlendOp[op].dst_alpha) {
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if ((blendcntl & RADEON_SBLEND_MASK) ==
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RADEON_SBLEND_GL_DST_ALPHA)
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blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
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RADEON_SBLEND_GL_ONE;
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else if ((blendcntl & RADEON_SBLEND_MASK) ==
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RADEON_SBLEND_GL_INV_DST_ALPHA)
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blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
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RADEON_SBLEND_GL_ZERO;
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}
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OUT_REG(RADEON_REG_RB3D_BLENDCNTL, blendcntl);
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END_DMA();
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LEAVE_DRAW(pDst);
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return TRUE;
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}
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static Bool
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R200CheckCompositeTexture(PicturePtr pPict, int unit)
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{
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int w = pPict->pDrawable->width;
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int h = pPict->pDrawable->height;
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int i;
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if ((w > 0x7ff) || (h > 0x7ff))
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ATI_FALLBACK(("Picture w/h too large (%dx%d)\n", w, h));
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for (i = 0; i < sizeof(R200TexFormats) / sizeof(R200TexFormats[0]); i++)
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{
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if (R200TexFormats[i].fmt == pPict->format)
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break;
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}
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if (i == sizeof(R200TexFormats) / sizeof(R200TexFormats[0]))
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ATI_FALLBACK(("Unsupported picture format 0x%x\n",
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pPict->format));
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if (pPict->repeat && ((w & (w - 1)) != 0 || (h & (h - 1)) != 0))
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ATI_FALLBACK(("NPOT repeat unsupported (%dx%d)\n", w, h));
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if (pPict->filter != PictFilterNearest &&
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pPict->filter != PictFilterBilinear)
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ATI_FALLBACK(("Unsupported filter 0x%x\n", pPict->filter));
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return TRUE;
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}
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static Bool
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R200TextureSetup(PicturePtr pPict, PixmapPtr pPix, int unit)
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{
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ATIScreenInfo *atis = accel_atis;
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KdScreenPriv(pPix->drawable.pScreen);
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CARD32 txfilter, txformat, txoffset, txpitch;
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int w = pPict->pDrawable->width;
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int h = pPict->pDrawable->height;
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int i;
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RING_LOCALS;
|
|
|
|
txpitch = pPix->devKind;
|
|
txoffset = ((CARD8 *)pPix->devPrivate.ptr -
|
|
pScreenPriv->screen->memory_base);
|
|
|
|
for (i = 0; i < sizeof(R200TexFormats) / sizeof(R200TexFormats[0]); i++)
|
|
{
|
|
if (R200TexFormats[i].fmt == pPict->format)
|
|
break;
|
|
}
|
|
txformat = R200TexFormats[i].card_fmt;
|
|
if (R200TexFormats[i].byte_swap)
|
|
txoffset |= R200_TXO_ENDIAN_BYTE_SWAP;
|
|
|
|
if (pPict->repeat) {
|
|
txformat |= ATILog2(w) << R200_TXFORMAT_WIDTH_SHIFT;
|
|
txformat |= ATILog2(h) << R200_TXFORMAT_HEIGHT_SHIFT;
|
|
} else
|
|
txformat |= R200_TXFORMAT_NON_POWER2;
|
|
txformat |= unit << R200_TXFORMAT_ST_ROUTE_SHIFT;
|
|
|
|
if ((txoffset & 0x1f) != 0)
|
|
ATI_FALLBACK(("Bad texture offset 0x%x\n", txoffset));
|
|
if ((txpitch & 0x1f) != 0)
|
|
ATI_FALLBACK(("Bad texture pitch 0x%x\n", txpitch));
|
|
|
|
switch (pPict->filter) {
|
|
case PictFilterNearest:
|
|
txfilter = (R200_MAG_FILTER_NEAREST |
|
|
R200_MIN_FILTER_NEAREST);
|
|
break;
|
|
case PictFilterBilinear:
|
|
txfilter = (R200_MAG_FILTER_LINEAR |
|
|
R200_MIN_FILTER_LINEAR);
|
|
break;
|
|
default:
|
|
ATI_FALLBACK(("Bad filter 0x%x\n", pPict->filter));
|
|
}
|
|
|
|
if (unit == 0) {
|
|
BEGIN_DMA(6);
|
|
OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_0 + 0x20 * unit, 5));
|
|
OUT_RING_REG(R200_REG_PP_TXFILTER_0, txfilter);
|
|
OUT_RING_REG(R200_REG_PP_TXFORMAT_0, txformat);
|
|
OUT_RING_REG(R200_REG_PP_TXFORMAT_X_0, 0);
|
|
OUT_RING_REG(R200_REG_PP_TXSIZE_0,
|
|
(pPix->drawable.width - 1) |
|
|
((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
|
|
OUT_RING_REG(R200_REG_PP_TXPITCH_0, txpitch - 32);
|
|
END_DMA();
|
|
} else {
|
|
BEGIN_DMA(6);
|
|
OUT_RING(DMA_PACKET0(R200_REG_PP_TXFILTER_1, 5));
|
|
OUT_RING_REG(R200_REG_PP_TXFILTER_1, txfilter);
|
|
OUT_RING_REG(R200_REG_PP_TXFORMAT_1, txformat);
|
|
OUT_RING_REG(R200_REG_PP_TXFORMAT_X_1, 0);
|
|
OUT_RING_REG(R200_REG_PP_TXSIZE_1,
|
|
(pPix->drawable.width - 1) |
|
|
((pPix->drawable.height - 1) << RADEON_TEX_VSIZE_SHIFT));
|
|
OUT_RING_REG(R200_REG_PP_TXPITCH_1, txpitch - 32);
|
|
END_DMA();
|
|
}
|
|
|
|
BEGIN_DMA(2);
|
|
OUT_REG(R200_PP_TXOFFSET_0 + 0x18 * unit, txoffset);
|
|
END_DMA();
|
|
|
|
if (pPict->transform != 0) {
|
|
is_transform[unit] = TRUE;
|
|
transform[unit] = pPict->transform;
|
|
} else {
|
|
is_transform[unit] = FALSE;
|
|
}
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
Bool
|
|
R200CheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
|
|
PicturePtr pDstPicture)
|
|
{
|
|
CARD32 tmp1;
|
|
|
|
/* Check for unsupported compositing operations. */
|
|
if (op >= sizeof(RadeonBlendOp) / sizeof(RadeonBlendOp[0]))
|
|
ATI_FALLBACK(("Unsupported Composite op 0x%x\n", op));
|
|
if (pMaskPicture != NULL && pMaskPicture->componentAlpha &&
|
|
RadeonBlendOp[op].src_alpha)
|
|
ATI_FALLBACK(("Component alpha not supported with source "
|
|
"alpha blending.\n"));
|
|
|
|
if (!R200CheckCompositeTexture(pSrcPicture, 0))
|
|
return FALSE;
|
|
if (pMaskPicture != NULL && !R200CheckCompositeTexture(pMaskPicture, 1))
|
|
return FALSE;
|
|
|
|
if (!RadeonGetDestFormat(pDstPicture, &tmp1))
|
|
return FALSE;
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
Bool
|
|
R200PrepareComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
|
|
PicturePtr pDstPicture, PixmapPtr pSrc, PixmapPtr pMask, PixmapPtr pDst)
|
|
{
|
|
KdScreenPriv(pDst->drawable.pScreen);
|
|
ATIScreenInfo(pScreenPriv);
|
|
CARD32 dst_format, dst_offset, dst_pitch;
|
|
CARD32 pp_cntl, blendcntl, cblend, ablend;
|
|
int pixel_shift;
|
|
RING_LOCALS;
|
|
|
|
RadeonGetDestFormat(pDstPicture, &dst_format);
|
|
pixel_shift = pDst->drawable.bitsPerPixel >> 4;
|
|
|
|
accel_atis = atis;
|
|
|
|
dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
|
|
pScreenPriv->screen->memory_base);
|
|
dst_pitch = pDst->devKind;
|
|
if ((dst_offset & 0x0f) != 0)
|
|
ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
|
|
if (((dst_pitch >> pixel_shift) & 0x7) != 0)
|
|
ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
|
|
|
|
if (!R200TextureSetup(pSrcPicture, pSrc, 0))
|
|
return FALSE;
|
|
pp_cntl = RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE;
|
|
|
|
if (pMask != NULL) {
|
|
if (!R200TextureSetup(pMaskPicture, pMask, 1))
|
|
return FALSE;
|
|
pp_cntl |= RADEON_TEX_1_ENABLE;
|
|
} else {
|
|
is_transform[1] = FALSE;
|
|
}
|
|
|
|
RadeonSwitchTo3D(atis);
|
|
|
|
BEGIN_DMA(17);
|
|
|
|
OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 3));
|
|
OUT_RING_REG(RADEON_REG_PP_CNTL, pp_cntl);
|
|
OUT_RING_REG(RADEON_REG_RB3D_CNTL, dst_format | RADEON_ALPHA_BLEND_ENABLE);
|
|
OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
|
|
|
|
OUT_REG(R200_REG_SE_VTX_FMT_0, R200_VTX_XY);
|
|
OUT_REG(R200_REG_SE_VTX_FMT_1,
|
|
(2 << R200_VTX_TEX0_COMP_CNT_SHIFT) |
|
|
(2 << R200_VTX_TEX1_COMP_CNT_SHIFT));
|
|
|
|
OUT_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
|
|
|
|
/* IN operator: Multiply src by mask components or mask alpha.
|
|
* BLEND_CTL_ADD is A * B + C.
|
|
* If a picture is a8, we have to explicitly zero its color values.
|
|
* If the destination is a8, we have to route the alpha to red, I think.
|
|
*/
|
|
cblend = R200_TXC_OP_MADD | R200_TXC_ARG_C_ZERO;
|
|
ablend = R200_TXA_OP_MADD | R200_TXA_ARG_C_ZERO;
|
|
|
|
if (pDstPicture->format == PICT_a8)
|
|
cblend |= R200_TXC_ARG_A_R0_ALPHA;
|
|
else if (pSrcPicture->format == PICT_a8)
|
|
cblend |= R200_TXC_ARG_A_ZERO;
|
|
else
|
|
cblend |= R200_TXC_ARG_A_R0_COLOR;
|
|
ablend |= R200_TXA_ARG_A_R0_ALPHA;
|
|
|
|
if (pMask) {
|
|
if (pMaskPicture->componentAlpha &&
|
|
pDstPicture->format != PICT_a8)
|
|
cblend |= R200_TXC_ARG_B_R1_COLOR;
|
|
else
|
|
cblend |= R200_TXC_ARG_B_R1_ALPHA;
|
|
ablend |= R200_TXA_ARG_B_R1_ALPHA;
|
|
} else {
|
|
cblend |= R200_TXC_ARG_B_ZERO | R200_TXC_COMP_ARG_B;
|
|
ablend |= R200_TXA_ARG_B_ZERO | R200_TXA_COMP_ARG_B;
|
|
}
|
|
|
|
OUT_RING(DMA_PACKET0(R200_REG_PP_TXCBLEND_0, 4));
|
|
OUT_RING_REG(R200_REG_PP_TXCBLEND_0, cblend);
|
|
OUT_RING_REG(R200_REG_PP_TXCBLEND2_0,
|
|
R200_TXC_CLAMP_0_1 | R200_TXC_OUTPUT_REG_R0);
|
|
OUT_RING_REG(R200_REG_PP_TXABLEND_0, ablend);
|
|
OUT_RING_REG(R200_REG_PP_TXABLEND2_0,
|
|
R200_TXA_CLAMP_0_1 | R200_TXA_OUTPUT_REG_R0);
|
|
|
|
/* Op operator. */
|
|
blendcntl = RadeonBlendOp[op].blend_cntl;
|
|
if (PICT_FORMAT_A(pDstPicture->format) == 0 &&
|
|
RadeonBlendOp[op].dst_alpha) {
|
|
if ((blendcntl & RADEON_SBLEND_MASK) ==
|
|
RADEON_SBLEND_GL_DST_ALPHA)
|
|
blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
|
|
RADEON_SBLEND_GL_ONE;
|
|
else if ((blendcntl & RADEON_SBLEND_MASK) ==
|
|
RADEON_SBLEND_GL_INV_DST_ALPHA)
|
|
blendcntl = (blendcntl & ~RADEON_SBLEND_MASK) |
|
|
RADEON_SBLEND_GL_ZERO;
|
|
}
|
|
OUT_REG(RADEON_REG_RB3D_BLENDCNTL, blendcntl);
|
|
END_DMA();
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
union intfloat {
|
|
float f;
|
|
CARD32 i;
|
|
};
|
|
|
|
struct blend_vertex {
|
|
union intfloat x, y;
|
|
union intfloat s0, t0;
|
|
union intfloat s1, t1;
|
|
};
|
|
|
|
#define VTX_DWORD_COUNT 6
|
|
|
|
#define VTX_OUT(_dstX, _dstY, _srcX, _srcY, _maskX, _maskY) \
|
|
do { \
|
|
OUT_RING_F(_dstX); \
|
|
OUT_RING_F(_dstY); \
|
|
OUT_RING_F(_srcX); \
|
|
OUT_RING_F(_srcY); \
|
|
OUT_RING_F(_maskX); \
|
|
OUT_RING_F(_maskY); \
|
|
} while (0)
|
|
|
|
void
|
|
RadeonComposite(int srcX, int srcY, int maskX, int maskY, int dstX, int dstY,
|
|
int w, int h)
|
|
{
|
|
ATIScreenInfo *atis = accel_atis;
|
|
ATICardInfo *atic = atis->atic;
|
|
int srcXend, srcYend, maskXend, maskYend;
|
|
RING_LOCALS;
|
|
PictVector v;
|
|
|
|
ENTER_DRAW(0);
|
|
|
|
/*ErrorF("RadeonComposite (%d,%d) (%d,%d) (%d,%d) (%d,%d)\n",
|
|
srcX, srcY, maskX, maskY,dstX, dstY, w, h);*/
|
|
|
|
srcXend = srcX + w;
|
|
srcYend = srcY + h;
|
|
maskXend = maskX + w;
|
|
maskYend = maskY + h;
|
|
if (is_transform[0]) {
|
|
v.vector[0] = IntToxFixed(srcX);
|
|
v.vector[1] = IntToxFixed(srcY);
|
|
v.vector[2] = xFixed1;
|
|
PictureTransformPoint(transform[0], &v);
|
|
srcX = xFixedToInt(v.vector[0]);
|
|
srcY = xFixedToInt(v.vector[1]);
|
|
v.vector[0] = IntToxFixed(srcXend);
|
|
v.vector[1] = IntToxFixed(srcYend);
|
|
v.vector[2] = xFixed1;
|
|
PictureTransformPoint(transform[0], &v);
|
|
srcXend = xFixedToInt(v.vector[0]);
|
|
srcYend = xFixedToInt(v.vector[1]);
|
|
}
|
|
if (is_transform[1]) {
|
|
v.vector[0] = IntToxFixed(maskX);
|
|
v.vector[1] = IntToxFixed(maskY);
|
|
v.vector[2] = xFixed1;
|
|
PictureTransformPoint(transform[1], &v);
|
|
maskX = xFixedToInt(v.vector[0]);
|
|
maskY = xFixedToInt(v.vector[1]);
|
|
v.vector[0] = IntToxFixed(maskXend);
|
|
v.vector[1] = IntToxFixed(maskYend);
|
|
v.vector[2] = xFixed1;
|
|
PictureTransformPoint(transform[1], &v);
|
|
maskXend = xFixedToInt(v.vector[0]);
|
|
maskYend = xFixedToInt(v.vector[1]);
|
|
}
|
|
|
|
if (atic->is_r100) {
|
|
BEGIN_DMA(4 * VTX_DWORD_COUNT + 3);
|
|
OUT_RING(DMA_PACKET3(RADEON_CP_PACKET3_3D_DRAW_IMMD,
|
|
4 * VTX_DWORD_COUNT + 2));
|
|
OUT_RING(RADEON_CP_VC_FRMT_XY |
|
|
RADEON_CP_VC_FRMT_ST0 |
|
|
RADEON_CP_VC_FRMT_ST1);
|
|
OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
|
|
RADEON_CP_VC_CNTL_PRIM_WALK_RING |
|
|
RADEON_CP_VC_CNTL_MAOS_ENABLE |
|
|
RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
|
|
(4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
|
|
} else {
|
|
BEGIN_DMA(4 * VTX_DWORD_COUNT + 2);
|
|
OUT_RING(DMA_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
|
|
4 * VTX_DWORD_COUNT + 1));
|
|
OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
|
|
RADEON_CP_VC_CNTL_PRIM_WALK_RING |
|
|
(4 << RADEON_CP_VC_CNTL_NUM_SHIFT));
|
|
}
|
|
|
|
VTX_OUT(dstX, dstY, srcX, srcY, maskX, maskY);
|
|
VTX_OUT(dstX, dstY + h, srcX, srcYend, maskX, maskYend);
|
|
VTX_OUT(dstX + w, dstY + h, srcXend, srcYend, maskXend, maskYend);
|
|
VTX_OUT(dstX + w, dstY, srcXend, srcY, maskXend, maskY);
|
|
|
|
LEAVE_DRAW(0);
|
|
|
|
END_DMA();
|
|
}
|
|
|
|
void
|
|
RadeonDoneComposite(void)
|
|
{
|
|
ENTER_DRAW(0);
|
|
LEAVE_DRAW(0);
|
|
}
|
|
|
|
Bool
|
|
RadeonPrepareTrapezoids(PicturePtr pDstPicture, PixmapPtr pDst)
|
|
{
|
|
KdScreenPriv(pDst->drawable.pScreen);
|
|
ATIScreenInfo(pScreenPriv);
|
|
ATICardInfo(pScreenPriv);
|
|
CARD32 dst_offset, dst_pitch;
|
|
int pixel_shift;
|
|
RING_LOCALS;
|
|
|
|
pixel_shift = pDst->drawable.bitsPerPixel >> 4;
|
|
|
|
accel_atis = atis;
|
|
|
|
dst_offset = ((CARD8 *)pDst->devPrivate.ptr -
|
|
pScreenPriv->screen->memory_base);
|
|
dst_pitch = pDst->devKind;
|
|
if ((dst_offset & 0x0f) != 0)
|
|
ATI_FALLBACK(("Bad destination offset 0x%x\n", dst_offset));
|
|
if (((dst_pitch >> pixel_shift) & 0x7) != 0)
|
|
ATI_FALLBACK(("Bad destination pitch 0x%x\n", dst_pitch));
|
|
|
|
RadeonSwitchTo3D(atis);
|
|
|
|
BEGIN_DMA(8);
|
|
|
|
OUT_RING(DMA_PACKET0(RADEON_REG_PP_CNTL, 5));
|
|
OUT_RING_REG(RADEON_REG_PP_CNTL, RADEON_TEX_BLEND_0_ENABLE);
|
|
OUT_RING_REG(RADEON_REG_RB3D_CNTL,
|
|
RADEON_COLOR_FORMAT_RGB8 | RADEON_ALPHA_BLEND_ENABLE);
|
|
OUT_RING_REG(RADEON_REG_RB3D_COLOROFFSET, dst_offset);
|
|
OUT_RING_REG(RADEON_REG_RE_WIDTH_HEIGHT,
|
|
((pDst->drawable.height - 1) << 16) |
|
|
(pDst->drawable.width - 1));
|
|
OUT_RING_REG(RADEON_REG_RB3D_COLORPITCH, dst_pitch >> pixel_shift);
|
|
OUT_REG(RADEON_REG_RB3D_BLENDCNTL, RadeonBlendOp[PictOpAdd].blend_cntl);
|
|
END_DMA();
|
|
|
|
if (atic->is_r100) {
|
|
BEGIN_DMA(4);
|
|
OUT_RING(DMA_PACKET0(RADEON_REG_PP_TXCBLEND_0, 3));
|
|
OUT_RING_REG(RADEON_REG_PP_TXCBLEND_0,
|
|
RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
|
|
RADEON_COLOR_ARG_C_TFACTOR_ALPHA);
|
|
OUT_RING_REG(RADEON_REG_PP_TXABLEND_0,
|
|
RADEON_BLEND_CTL_ADD | RADEON_CLAMP_TX |
|
|
RADEON_ALPHA_ARG_C_TFACTOR_ALPHA);
|
|
OUT_RING_REG(RADEON_REG_PP_TFACTOR_0, 0x01000000);
|
|
END_DMA();
|
|
} else if (atic->is_r200) {
|
|
BEGIN_DMA(14);
|
|
OUT_REG(R200_REG_SE_VTX_FMT_0, R200_VTX_XY);
|
|
OUT_REG(R200_REG_SE_VTX_FMT_1, 0);
|
|
OUT_REG(R200_REG_PP_TXCBLEND_0,
|
|
R200_TXC_ARG_C_TFACTOR_COLOR);
|
|
OUT_REG(R200_REG_PP_TXABLEND_0,
|
|
R200_TXA_ARG_C_TFACTOR_ALPHA);
|
|
OUT_REG(R200_REG_PP_TXCBLEND2_0, R200_TXC_OUTPUT_REG_R0);
|
|
OUT_REG(R200_REG_PP_TXABLEND2_0, R200_TXA_OUTPUT_REG_R0);
|
|
OUT_REG(RADEON_REG_PP_TFACTOR_0, 0x01000000);
|
|
END_DMA();
|
|
}
|
|
|
|
return TRUE;
|
|
}
|
|
|
|
#define TRAP_VERT_RING_COUNT 2
|
|
|
|
#define TRAP_VERT(_x, _y) \
|
|
do { \
|
|
OUT_RING_F((_x) + sample_x); \
|
|
OUT_RING_F((_y) + sample_y); \
|
|
} while (0)
|
|
|
|
void
|
|
RadeonTrapezoids(KaaTrapezoid *traps, int ntraps)
|
|
{
|
|
ATIScreenInfo *atis = accel_atis;
|
|
ATICardInfo *atic = atis->atic;
|
|
RING_LOCALS;
|
|
|
|
while (ntraps > 0) {
|
|
int i, sample, count, vertcount;
|
|
|
|
count = 0xffff / 4 / sample_count;
|
|
if (count > ntraps)
|
|
count = ntraps;
|
|
vertcount = count * sample_count * 4;
|
|
|
|
if (atic->is_r100) {
|
|
BEGIN_DMA(3 + vertcount * TRAP_VERT_RING_COUNT);
|
|
OUT_RING(DMA_PACKET3(RADEON_CP_PACKET3_3D_DRAW_IMMD,
|
|
2 + vertcount * TRAP_VERT_RING_COUNT));
|
|
OUT_RING(RADEON_CP_VC_FRMT_XY);
|
|
OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
|
|
RADEON_CP_VC_CNTL_PRIM_WALK_RING |
|
|
RADEON_CP_VC_CNTL_MAOS_ENABLE |
|
|
RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE |
|
|
(vertcount << RADEON_CP_VC_CNTL_NUM_SHIFT));
|
|
} else {
|
|
BEGIN_DMA(2 + vertcount * TRAP_VERT_RING_COUNT);
|
|
OUT_RING(DMA_PACKET3(R200_CP_PACKET3_3D_DRAW_IMMD_2,
|
|
1 + vertcount * TRAP_VERT_RING_COUNT));
|
|
OUT_RING(RADEON_CP_VC_CNTL_PRIM_TYPE_TRI_FAN |
|
|
RADEON_CP_VC_CNTL_PRIM_WALK_RING |
|
|
(vertcount << RADEON_CP_VC_CNTL_NUM_SHIFT));
|
|
}
|
|
|
|
for (i = 0; i < count; i++) {
|
|
for (sample = 0; sample < sample_count; sample++) {
|
|
float sample_x = sample_offsets_x[sample];
|
|
float sample_y = sample_offsets_y[sample];
|
|
TRAP_VERT(traps[i].tl, traps[i].ty);
|
|
TRAP_VERT(traps[i].bl, traps[i].by);
|
|
TRAP_VERT(traps[i].br, traps[i].by);
|
|
TRAP_VERT(traps[i].tr, traps[i].ty);
|
|
}
|
|
}
|
|
END_DMA();
|
|
|
|
ntraps -= count;
|
|
traps += count;
|
|
}
|
|
}
|
|
|
|
void
|
|
RadeonDoneTrapezoids(void)
|
|
{
|
|
ATIScreenInfo *atis = accel_atis;
|
|
RING_LOCALS;
|
|
|
|
BEGIN_DMA(2);
|
|
OUT_REG(RADEON_REG_RE_WIDTH_HEIGHT, 0xffffffff);
|
|
END_DMA();
|
|
}
|